TP-Link Archer C59v1 is a dual-band AC1350 router, based on Qualcomm/Atheros
QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- 8x LED (controled by 74HC595), 3x button
- UART header on PCB
TP-Link Archer C60v1 is a dual-band AC1350 router, based on Qualcomm/Atheros
QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Currently not working:
- Port LAN1 on C59, LAN4 on C60
- WiFi 5GHz (missing ath10k firmware for QCA9886 chip)
- Update from oficial web interface ( tplink-saveloader not support "product-info")
Flash instruction:
1. Set PC to fixed ip address 192.168.0.66
2. Download lede-ar71xx-generic-archer-cXX-v1-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Flash instruction under U-Boot, using UART:
1. tftp 0x81000000 lede-ar71xx-...-sysupgrade.bin
2. erase 0x9f020000 +$filesize
3. cp.b $fileaddr 0x9f020000 $filesize
4. reset
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
[Jo-Philipp Wich: remove duplicate ATH79_MACH_ARCHER_C59/C60_V1 entries]
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
Support Abicom International Scorpion SC450 Board
QCA9550 700MHz Extended Temperature Range
256MB DDR2
256MB NAND Flash
16MB NOR Flash
10/100/1000 Ethernet
15W Max, 3x3 Mode, Full Power TX Power
802.3-at POE+ & DC Input options
100x 85mm
USB
PCIe
SFP
GPIO/LED
Signed-off-by: Conor O'Gorman <i@conorogorman.net>
Support Abicom International Scorpion SC300M Module
QCA9550 700MHz Extended Temperature Range
256MB DDR2
256MB Nand Flash
16MB SPI Flash
802.11a/na/b/g/ng
GPIO x 22, USB x2, PCIe x2
10/100/1000 Ethernet
23dBm, Optional Onboard Antenna
DC Input, 8-20V DC
85 x 55 mm
Signed-off-by: Conor O'Gorman <i@conorogorman.net>
The soft_config partition must be writeable for rbcfg to be able to
enact changes to the routerboot configuration.
The read-only flag was a mistake in the initial patch. Removing it
brings mach-rb941.c in line with all other RB platforms.
Signed-off-by: Thibaut VARENE <hacks@slashdirt.org>
Add full support for Mikrotik RB-941-2nD (hAP lite)
Original patch by Sergey Sergeev <adron@yapic.net> and
more information is available here:
https://wiki.openwrt.org/toh/mikrotik/rb941_2nd
I updated and adapted the patch to apply cleanly to LEDE trunk
and added proper numbering for the switch ports (matching case
labels).
Tested working on actual hardware with the information
provided in the above webpage. Sysupgrade works.
Signed-off-by: Thibaut VARENE <hacks@slashdirt.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Remove the wget2nand script, drop the need for manual installation,
use sysupgrade instead.
There are now two different NAND images, one for 64 MiB flashes, the
other for >= 128 MiB
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Add full support for TP-Link RE450.
The wireless SoC is similiar to Archer C7: QCA9558 + QCA9880 (pci).
The ethernet interface is AR8035, but the mdio is connected to the gpio and
the chipset builtin mdio bus isn't used, which is unique (and weird), so the
kernel gpio mdio module is used.
The two ethernet leds are connected to the GPIO, so they are both configured,
one to indicate link status and the other to indicate data transfer.
The generation of the image was added to the image Makefile.
The return value of tplink-safeloader is not ignored anymore (to fail on error)
The result factory image is flashable from the stock web ui.
Signed-off-by: Tal Keren <kooolk@gmail.com>
[rd@radekdostal.com: ar71xx: RE450: do not build RE450 for nand]
Signed-off-by: Radek Dostál <rd@radekdostal.com>
[hyniu@o2.pl: ar71xx: RE450: Renaming LED accordance with the standard]
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
[jo@mein.io: squash fixes from Radek and Henryk into original commit]
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
This patch adds supports for the WNR2000v1 board with 4MB flash, and
produces device-specific factory, rootfs, and sysupgrade files for the
WNR2000v1. This board is errorneously claimed as supported on the OpenWRT
wiki as AP81, but AP81 image would not work because of APT81 image
requiring having 8MB of flash, while WNR2000v1 has only 4MB.
The image requires the u-boot bootloader to be modified to fuhry's
bootloader first.
Short specification:
- CPU: Atheros AR9132
- 4x 10/100 Mbps Ethernet, 1x WAN 10/100 Mbps
- 4 MB of Flash
- 32 MB of RAM
- UART header (J1) on board
- 1x button
Factory/Initial flash instructions:
- Set up a TFTP server on your local machine.
- Download the uImage for ar71xx-generic and the rootfs image for
ar71xx-generic-wnr2000 and save in the tftp server root.
- Gain serial access to the router via the UART port (telnetenable over
the network only won't work!).
- Upgrade the u-boot bootloader to fuhry's version by running the
script: http://fuhry.com/b/wnr2000/install-repart.sh
- When the router restarts, interrupt u-boot and gain access to u-boot command line.
- Repartititon the board and flash initial uImage and rootfs as follow.
Commands to type in u-boot:
# tells u-boot that we have a tftp server on 192.168.1.10
setenv serverip 192.168.1.10
# tells u-boot that the router should take the address 192.168.1.1
setenv ipaddr 192.168.1.1
# erase the region from 0x050000-0x3f0000
erase 0xbf050000 +0x3A0000
# loads sqfs.bin on TFTP server, and put it to memory address 0x81000000
tftpboot 0x81000000 sqfs.bin
# it will tell you the length of sqfs.bin in hex, let's say ZZZZZZ
# copy bit by bit 0xZZZZZZ bytes from offset 0x050000
cp.b 0x81000000 0xbf050000 0xZZZZZZ
# same to the uImage.bin, write it right next to sqfs.bin
# again, 0xYYYYYY is the length that tftpboot reports
tftpboot 0x81000000 uImage.bin
cp.b 0x81000000 0xbf2a0000 0xYYYYYY
# We need to tell the kernel what board it is booting into, and where to find the partitions
setenv bootargs "board=WNR2000 console=ttyS0,115200 mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,3712k(firmware),64k(art)ro rootfstype=squashfs,jffs2 noinitrd"
# Tell u-boot where to find the uImage
setenv bootcmd "bootm 0xbf2a0000"
# Tell u-boot to save parameters to the u-boot-env partitions
saveenv
# Reset the board
reset
Tested on:
- WNR2000v1 board.
- Initial flash works.
Known bugs:
- I don't know why factory image doesn't work on initial flash on stock
firmware in u-boot recovery mode while it should.
- Sysupgrade does not yet work, if you do -f it will mess up your
installation (requiring a reinstall of sqfs and uImage).
Signed-off-by: Huan Truong <htruong@tnhh.net>
This board is very old and unlikely to still be relevant today. Support
for it contains a significant amount of device specific baggage which is
worth getting rid of.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
YunCore SR3200 is a dual-band AC1200 router, based on Qualcomm/Atheros
QCA9563+QCA9882+QCA8337N.
YunCore XD3200 (FCC ID: 2ADUG-XD3200) is a dual-band AC1200 ceiling mount
AP with PoE support, based on Qualcomm/Atheros QCA9563+QCA9882+QCA8334.
Common specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB or RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz, with ext. PA (SKY65174-21), up to 30 dBm
- 2T2R 5 GHz, with ext. PA (SKY85405-11) and LNA (SKY85601-11), up to 30 dBm
SR3200 specification:
- 5x 10/100/1000 Mbps Ethernet
- 6x ext. RP-SMA antennas (actually, only 4 are connected with radio chips)
- 3x LED (+ 5x LED in RJ45 sockets), 1x button
- UART header on PCB
XD3200 specification:
- 2x 10/100/1000 Mbps Ethernet, with 802.3at PoE support (WAN port)
- 4x internal antennas
- 3 sets of LEDs on external PCB (+ 2x LED near RJ45 sockets), 1x button
- UART and JTAG (custom 6-pin, 2 mm pitch) headers on PCB
LED for 5 GHz WLAN is currently not supported on both devices as it is
connected directly to the QCA9882 radio chip.
Flash instruction under vendor firmware, using telnet/SSH:
1. If your firmware does not have root password, go to point 5
2. Connect PC with 192.168.1.x address to LAN or WAN port
3. Power up device, enter failsafe mode with button (no LED indicator!)
4. Change root password and reboot (mount_root, passwd ..., reboot -f)
5. Upload lede-ar71xx-...-sysupgrade.bin to /tmp using SCP
6. Connect PC with 192.168.188.x address to LAN port, SSH to 192.168.188.253
7. Invoke:
- cd /tmp
- fw_setenv bootcmd "bootm 0x9fe80000 || bootm 0x9f050000"
- mtd -e firmware -r write lede-ar71xx-...-sysupgrade.bin firmware
Flash instruction under U-Boot, using UART:
1. tftp 0x80060000 lede-ar71xx-...-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9fe80000 || bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This device uses NAND FLASH, so it should be kept in nand subtarget.
Also, inlcude in packages kmod-usb-ledtrig-usbport instead of
obsolete kmod-ledtrig-usbdev.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
CPE830 is a clone of AP90Q, with different type of antenna (panel)
and additional 4 LEDs for WiFi signal level indication.
Use the same flash approach as for YunCore AP90Q.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
YunCore AP90Q is an outdoor CPE/AP based on Qualcomm/Atheros QCA9531 v2.
Short specification:
- 650/600/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, passive PoE support
- 64/128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz with external PA, up to 29 dBm
- 2x internal 5 dBi omni antennas
- 4x LED, 1x button
- UART (JP1) header on PCB
Flash instruction under U-Boot, using UART:
1. tftp 0x80060000 lede-ar71xx-generic-ap90q-squashfs-sysupgrade
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Flash instruction under vendor fimrware, using telnet/SSH:
1. Connect PC with 192.168.1.x address to WAN port
2. Power up device, enter failsafe mode with button (no LED indicator!)
3. Change root password and reboot (mount_root, passwd ..., reboot -f)
4. Upload lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin to /tmp using SCP
5. Connect PC with 192.168.188.x address to LAN port, SSH to 192.168.188.253
6. Invoke:
- cd /tmp
- fw_setenv bootcmd "bootm 0x9f050000"
- mtd erase firmware
- mtd -r write lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin firmware
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
COMFAST CF-E380AC v1/v2 is a ceiling mount AP with PoE
support, based on Qualcomm/Atheros QCA9558+QCA9880+AR8035.
There are two versions of this model, with different RAM
and U-Boot mtd partition sizes:
- v1: 128 MB of RAM, 128 KB U-Boot image size
- v2: 256 MB of RAM, 256 KB U-Boot image size
Version number is available only inside vendor GUI,
hardware and markings are the same.
Short specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 1x 10/100/1000 Mbps Ethernet, with PoE support
- 128 or 256 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz, with external PA (SE2576L), up to 28 dBm
- 3T3R 5 GHz, with external PA (SE5003L1), up to 30 dBm
- 6x internal antennas
- 1x RGB LED, 1x button
- UART (T11), LEDs/GPIO (J7) and USB (T12) headers on PCB
- external watchdog (Pericon Technology PT7A7514)
Flash instruction:
Original firmware is based on OpenWrt.
Use sysupgrade image directly in vendor GUI.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
As we already have support for CF-E316N v2 and many devices from
this vendor look similar, the support was included in existing
mach-*.c file, with few cleanups and fixes.
All 3 devices are based on Qualcomm/Atheros QCA9531 v2.
COMFAST CF-E320N v2 is a ceiling mount AP with PoE support.
Short specification:
- 650/393/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE support
- 64 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- 2x internal antennas
- 1x RGB LED, 1x button
- UART (J1), GPIO (J9) and USB (J2) headers on PCB
- external watchdog (Pericon Technology PT7A7514)
COMFAST CF-E520N/CF-E530N are in-wall APs with USB and PoE support.
They seem to have different only the front panel.
Short specification:
- 650/393/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, WAN with PoE support
- 1x USB 2.0 (in CF-E520N covered by panel, available on PCB)
- 32 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- 2x internal antennas
- 1x LED, 1x button
- UART (J1) headers on PCB
Flash instruction:
Original firmware is based on OpenWrt.
Use sysupgrade image directly in vendor GUI.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
In 814d70b2 the member mac06_exchange_en of struct
ar8327_pad_cfg was changed to mac06_exchange_dis,
but wpj344 was not adopted to stay in sync.
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
Reported-by: Nick Dennis <ndennis@rapiduswireless.com>
This patch adds support solely for version 1 of the TP-Link WR802N.
It is based on Rick Pannen's patch posted on the OpenWrt devel list.
Signed-off-by: Julius Schulz-Zander <julius@inet.tu-berlin.de>
On the stock Meraki Firmare for the MR12/MR16, a chunk of SPI space
after u-boot-env is used to store the boards Mac address. Sadly as this
was removed on any device already on OpenWRT/LEDE, moving forward a new,
64k partition named "mac" will be used to store the mac address for the
device (which is the minimum size). This allows users to properly set
the correct MAC, without editing the ART partition (which holds the same
MAC for all devices).
The reason the space is taken from kernel instead of rootfs is currently
kernels are only 1.3MB, so that way we can leave the current rootfs
space alone for users who fully utilize the available storage space.
Once this partition is added to a device, you can set your MAC doing the
following:
mtd erase mac
echo -n -e '\x00\x18\x0a\x33\x44\x55' > /dev/mtd5
sync && reboot
Where 00:18:0a:33:44:55 is your MAC address.
This was tested, and confirmed working on both the MR12 and MR16.
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
This patch adds support for the Airtight C-60.
SOC: Atheros AR9344 rev 2 (CPU:560.000MHz)
RAM: 128 MiB
NOR: MX25L3205D 4MiB
NAND: ST Micro NAND 32MiB 3,3V 8-bit
SW-NET: AR8327N (2 Ports)
WLAN1: Dual-Band AR9340 Rev:2 (built-in SoC)
WLAN2: Dual-Band AR9300 Rev:4 PCIe Chip
The switch is setup for an accesspoint:
LAN1: (gigabit) is the wan-port.
LAN2: (fast ethernet) is bridged with the br-lan.
Flashing Guide (via initramfs):
1. Connect a PC to the serial port of the C-60.
power up the C-60.
Enter u-boot command prompt:
#> nand erase
#> setenv bootcmd "bootm 0x9f060000"
#> saveenv
#> setenv ipaddr 192.168.1.1
#> setenv netmask 255.255.255.0
#> setenv serverip 192.168.1.100
#> setenv bootfile lede-ar71xx-nand-c-60-initramfs-kernel.bin
#> tftpboot
#> bootm
2. Wait for the C-60 to boot LEDE.
On the root prompt. Enter:
# ubiformat /dev/mtd4
# ubiattach -p /dev/mtd4
3. After that copy the sysupgrade.tar onto the router and run:
# sysupgrade sysupgrade.tar
to flash the image.
Special thanks to Chris Blake <chrisrblake93@gmail.com>. He provided
a C-60 unit and he helped with debugging the switch, LEDs and platfrom
support.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch adds support for Cisco's Z1.
Detailed instructions for the flashing the device can
be found in the OpenWrt wiki:
<https://wiki.openwrt.org/toh/meraki/z1>
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Zbtlink ZBT-WE1526 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 650/400/200 MHz (CPU/DDR/AHB)
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- two external, non-detachable antennas
- 8x LED, 1x button
- UART header (pinout: VCC, RX, TX, GND)
Flash instruction:
Use sysupgrade in vendor firmare which is based on OpenWrt.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337.
Short specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 2x 10/100/1000 Mbps Ethernet
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm
- 3x MMCX connectors
- power input: 802.3at PoE or wide range DC (36-57 V)
- optional 802.3af PSE
- 1x mini-PCIe connector with PCIe, USB buses and SIM slot
- 1x mini-PCIe connector with PCIe bus
- 1x USB type-A connector
- 6x LED, 1x button (hardware reset)
- RS232 (MAX3223) and (E)JTAG headers
Default configuration:
- WAN on eth1 (RJ45 near LEDs with PoE input)
- LAN on eth0 (RJ45 near DC jack)
- left top LED set to be status LED
- all LEDs configurable form user space
Flash instruction (do it under U-Boot, using RS232):
1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers
Default configuration:
- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset
Flash instruction (do it under U-Boot, using UART):
1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This patch adds the target profile SOM9331 and configures hardware
functionality for the 3x Eth Ports & corresponding LED's, the USB Host,
the USART to USB bridge and the System LED.
Signed-off-by: Allan Nick Pedrana <nik9993@gmail.com>
The cpe510 has two calibration tables. The first calibration
table requires to modify ath9k driver to work (patched tx gain table).
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The LNA improves the rx path. Within a simple test setup
it improved the signal from -60dbm to -40dbm.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
- CPU QCA9531-BL3A
- RAM: 64MB
- flash: 16MB
- USB
AP143 platform, similar to tl-wr841n v10/v11, but with USB
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
To avoid confusion with different unifiac devices, rename existing target
"unifiac" to "unifiac-lite", before "unifiac-pro" is introduced.
Signed-off-by: P.Wassi <p.wassi at gmx.at>
The file linux/mdio-gpio.h was moved to linux/platform_data/mdio-gpio.h
in kernel 4.4
Reported-by: Arjen de Korte <arjen+openwrt@de-korte.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 49193
OpenWrt can be flashed with following uboot commands:
tftpboot 0x80500000 openwrt-ar71xx-generic-wpj342-16M-squashfs-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
SVN-Revision: 49157
This patch provides full GPIO support for WNR2200 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49101
Fix for invalid/random/duplicate WLAN MAC address in WNR2200.
Permanent platform MAC is calculated and assigned during system startup.
WLAN MAC follows wired Ethernet interface addresses.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49100
This patch provides full GPIO support for WNR1000v2 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49076
Not all mach-* files set all boards correctly in ETH_CFG. They depend on
some preset values by u-boot which were not previously modified by
ath79_setup_qca955x_eth_cfg. Avoiding to modify them in this function keeps
it backward compatible for these boards.
This reverts commit 119b8ab2c2eac237ec4e9c4d0ed53df22b5c6978.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49072
The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.
This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49071
The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR1750 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49070
The MR900 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR900 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49069
Fix for invalid/random WLAN MAC address in WNR1000v2. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses. This is the same fix as for WNR2000v3
and WNR612v2.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49051
The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49031
The delays of PHY/MAC on the MR900 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49030
Some u-boot versions for QCA955x change the delays based on the link speed
during boot. This usually breaks the support of other linkspeeds when
OpenWrt is booted. It also conflicts with the
at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own
values in QCA955X_GMAC_REG_ETH_CFG.
The default RGMII values from the Atheros u-boot are currently used to
preset the existing mach files. These may have to be adjusted for boards
using different values but which are not currently set them explicitely in
OpenWrt.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Christian Beier <cb@shoutrlabs.com>
Cc: Chris R Blake <chrisrblake93@gmail.com>
Cc: Benjamin Berg <benjamin@sipsolutions.net>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
Cc: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Dirk Neukirchen <dirkneukirchen@web.de>
Cc: Christian Mehlis <christian@m3hlis.de>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 49029
