ar71xx: add support for jjPlus JWAP230
jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337. Short specification: - 720/600/200 MHz (CPU/DDR/AHB) - 2x 10/100/1000 Mbps Ethernet - 128 MB of RAM (DDR2) - 16 MB of FLASH - 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm - 3x MMCX connectors - power input: 802.3at PoE or wide range DC (36-57 V) - optional 802.3af PSE - 1x mini-PCIe connector with PCIe, USB buses and SIM slot - 1x mini-PCIe connector with PCIe bus - 1x USB type-A connector - 6x LED, 1x button (hardware reset) - RS232 (MAX3223) and (E)JTAG headers Default configuration: - WAN on eth1 (RJ45 near LEDs with PoE input) - LAN on eth0 (RJ45 near DC jack) - left top LED set to be status LED - all LEDs configurable form user space Flash instruction (do it under U-Boot, using RS232): 1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This commit is contained in:
Piotr Dymacz
Jo-Philipp Wich
parent
2923b334e5
commit
d2c9b169b3
10 changed files with 192 additions and 0 deletions
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@ -411,6 +411,12 @@ gl-ar300)
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"0@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
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;;
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jwap230)
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ucidef_set_interfaces_lan_wan "eth0" "eth1"
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ucidef_add_switch "switch0" \
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"0@eth0" "1:lan" "5:wan" "6@eth1"
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;;
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wpj342)
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ucidef_add_switch "switch0" \
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"0@eth0" "1:lan" "2:wan"
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@ -158,6 +158,9 @@ get_status_led() {
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ja76pf2)
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status_led="jjplus:green:led1"
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;;
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jwap230)
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status_led="jwap230:green:led1"
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;;
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ls-sr71)
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status_led="ubnt:green:d22"
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;;
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@ -566,6 +566,9 @@ ar71xx_board_detect() {
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*JWAP003)
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name="jwap003"
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;;
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*JWAP230)
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name="jwap230"
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;;
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*"Hornet-UB")
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local size
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size=$(awk '/firmware/ { print $2 }' /proc/mtd)
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@ -236,6 +236,7 @@ platform_check_image() {
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gl-domino | \
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hiwifi-hc6361 | \
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hornet-ub-x2 | \
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jwap230 | \
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mzk-w04nu | \
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mzk-w300nh | \
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tew-632brp | \
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@ -97,6 +97,7 @@ CONFIG_ATH79_MACH_HIWIFI_HC6361=y
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CONFIG_ATH79_MACH_HORNET_UB=y
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CONFIG_ATH79_MACH_JA76PF=y
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CONFIG_ATH79_MACH_JWAP003=y
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CONFIG_ATH79_MACH_JWAP230=y
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CONFIG_ATH79_MACH_MC_MAC1200R=y
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CONFIG_ATH79_MACH_MR12=y
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CONFIG_ATH79_MACH_MR16=y
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@ -680,6 +680,15 @@ config ATH79_MACH_JWAP003
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select ATH79_DEV_M25P80
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select ATH79_DEV_USB
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config ATH79_MACH_JWAP230
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bool "jjPlus JWAP230 board support"
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select SOC_QCA955X
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select ATH79_DEV_ETH
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_M25P80
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select ATH79_DEV_USB
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select ATH79_DEV_WMAC
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config ATH79_MACH_WRT160NL
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bool "Linksys WRT160NL board support"
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select SOC_AR913X
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@ -100,6 +100,7 @@ obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o
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obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o
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obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o
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obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o
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obj-$(CONFIG_ATH79_MACH_JWAP230) += mach-jwap230.o
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obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o
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obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o
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obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o
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158
target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c
Normal file
158
target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c
Normal file
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@ -0,0 +1,158 @@
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/*
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* jjPlus JWAP230 board support
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*
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* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
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*
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* Based on mach-wpj558.c and mach-tl-wr1043nd-v2.c
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "pci.h"
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#define JWAP230_GPIO_LED_LED1 23
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#define JWAP230_GPIO_LED_LED2 22
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#define JWAP230_GPIO_LED_LED3 21
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#define JWAP230_MAC0_OFFSET 0x0
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#define JWAP230_MAC1_OFFSET 0x6
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#define JWAP230_WMAC_CALDATA_OFFSET 0x1000
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static struct gpio_led jwap230_leds_gpio[] __initdata = {
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{
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.name = "jwap230:green:led1",
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.gpio = JWAP230_GPIO_LED_LED1,
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.active_low = 1,
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},
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{
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.name = "jwap230:green:led2",
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.gpio = JWAP230_GPIO_LED_LED2,
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.active_low = 1,
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},
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{
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.name = "jwap230:green:led3",
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.gpio = JWAP230_GPIO_LED_LED3,
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.active_low = 1,
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}
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};
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static const struct ar8327_led_info jwap230_leds_qca8337[] = {
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AR8327_LED_INFO(PHY0_0, HW, "jwap230:green:lan"),
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AR8327_LED_INFO(PHY4_0, HW, "jwap230:green:wan"),
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};
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/* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */
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static struct ar8327_led_cfg jwap230_qca8337_led_cfg = {
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.led_ctrl0 = 0xcf37cf37,
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.led_ctrl1 = 0xcf37cf37,
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.led_ctrl2 = 0xcf37cf37,
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.led_ctrl3 = 0x0,
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.open_drain = true,
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};
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/* QCA8337 GMAC0 is connected with QCA9558 over RGMII */
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static struct ar8327_pad_cfg jwap230_qca8337_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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.mac06_exchange_dis = true,
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};
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/* QCA8337 GMAC6 is connected with QCA9558 over SGMII */
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static struct ar8327_pad_cfg jwap230_qca8337_pad6_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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};
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static struct ar8327_platform_data jwap230_qca8337_data = {
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.pad0_cfg = &jwap230_qca8337_pad0_cfg,
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.pad6_cfg = &jwap230_qca8337_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.led_cfg = &jwap230_qca8337_led_cfg,
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.num_leds = ARRAY_SIZE(jwap230_leds_qca8337),
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.leds = jwap230_leds_qca8337,
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};
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static struct mdio_board_info jwap230_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &jwap230_qca8337_data,
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},
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};
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static void __init jwap230_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(jwap230_leds_gpio),
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jwap230_leds_gpio);
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mdiobus_register_board_info(jwap230_mdio0_info,
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ARRAY_SIZE(jwap230_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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/* QCA9558 GMAC0 is connected to RMGII interface */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0xa6000000;
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ath79_init_mac(ath79_eth0_data.mac_addr, art + JWAP230_MAC0_OFFSET, 0);
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ath79_register_eth(0);
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/* QCA9558 GMAC1 is connected to SGMII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_init_mac(ath79_eth1_data.mac_addr, art + JWAP230_MAC1_OFFSET, 0);
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ath79_register_eth(1);
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ath79_register_wmac(art + JWAP230_WMAC_CALDATA_OFFSET, NULL);
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ath79_register_pci();
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ath79_register_usb();
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}
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MIPS_MACHINE(ATH79_MACH_JWAP230, "JWAP230", "jjPlus JWAP230", jwap230_setup);
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@ -94,6 +94,7 @@ enum ath79_mach_type {
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ATH79_MACH_JA76PF, /* jjPlus JA76PF */
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ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */
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ATH79_MACH_JWAP003, /* jjPlus JWAP003 */
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ATH79_MACH_JWAP230, /* jjPlus JWAP230 */
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ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */
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ATH79_MACH_MR12, /* Cisco Meraki MR12 */
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ATH79_MACH_MR16, /* Cisco Meraki MR16 */
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@ -268,6 +268,15 @@ define Device/gl-inet-6416A-v1
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endef
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TARGET_DEVICES += gl-inet-6408A-v1 gl-inet-6416A-v1
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define Device/jwap230
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DEVICE_TITLE := jjPlus JWAP230
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DEVICE_PACKAGES := kmod-usb-core kmod-usb2
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BOARDNAME = JWAP230
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IMAGE_SIZE = 16000k
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MTDPARTS = spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro
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endef
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TARGET_DEVICES += jwap230
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define Device/rnx-n360rt
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$(Device/tplink-4m)
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DEVICE_TITLE := Rosewill RNX-N360RT
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