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228 commits

Author SHA1 Message Date
Gabor Juhos
d2316b2a45 ar71xx: ag71xx: add support for getting switch port link status 
SVN-Revision: 29017
 2011-11-13 11:27:04 +00:00
Gabor Juhos
34015ed6e8 ar71xx: ag71xx: remove unused mii_ctrl field from struct ag71xx 
SVN-Revision: 29015
 2011-11-13 11:27:01 +00:00
Gabor Juhos
2d882cff23 ar71xx: ag71xx: remove unused mii_cfg related functions and defines 
SVN-Revision: 29014
 2011-11-13 11:27:00 +00:00
Gabor Juhos
538a9493b9 ar71xx: set MII interface speed from the set_speed callbacks 
SVN-Revision: 29013
 2011-11-13 11:26:59 +00:00
Gabor Juhos
93cd46be13 ar71xx: rename set_pll callback to set_speed in ag71xx_platform_data 
Also rename the corresponding callback functions.

SVN-Revision: 29012
 2011-11-13 11:26:57 +00:00
Gabor Juhos
9579bb4267 ar71xx: ag71xx: remove MII interface setup code 
SVN-Revision: 29011
 2011-11-13 11:26:56 +00:00
Gabor Juhos
2f9e535e89 ar71xx: ag71xx: use fixed link parameters if the mii bus is not registered 
SVN-Revision: 28977
 2011-11-12 10:54:16 +00:00
Felix Fietkau
7a2efd8c28 ar71xx: remove dead code 
SVN-Revision: 28851
 2011-11-08 00:33:20 +00:00
Felix Fietkau
94309039b7 ar71xx: on ar7240, exclude ports from their own port vlan destination mask 
SVN-Revision: 28850
 2011-11-08 00:33:15 +00:00
Jonas Gorski
c674c874b7 ag71xx: close a race between the phy state machine and link state 
A fast stop/start cycle could leave the ag71xx interrupts and tx engine
disabled when using a phy driver with a fixed link and the start/stop
happens between two phy state machine polls.

Prevent this by always forcing the link down on stop regardless of phy
state and having a phy connected.

SVN-Revision: 28380
 2011-10-08 11:37:14 +00:00
Felix Fietkau
1bdf65f580 ar71xx: fix register range check for DMA stuck checks (thx, Frédéric Moulins) 
SVN-Revision: 28213
 2011-09-11 17:44:12 +00:00
Felix Fietkau
12c84f8eeb ar71xx: add some code to detect DMA stuck conditions on ar7240 
SVN-Revision: 27975
 2011-08-13 22:30:14 +00:00
Felix Fietkau
85ccc74e1b ar71xx: on ar724x only reset the link status in the restart handler, the fast reset takes care of DMA stuck issues 
SVN-Revision: 27973
 2011-08-13 21:49:46 +00:00
Felix Fietkau
4b75394056 ar71xx: fix ethernet FIFO state corruption on ar7240 
When starting/stopping DMA sometimes the FIFO state gets corrupted,
leading to wildly fluctuating latencies or packet data corruption.
Fix this by issuing a fast MAC reset as soon as the link is detected
as up. Fixes #9689, #9405

SVN-Revision: 27896
 2011-08-04 17:36:31 +00:00
Felix Fietkau
d2aeca6b6d ag71xx: fix memory corruption issues on ar7240 on ethernet start/stop 
When the DMA engine state gets corrupted due to a hardware issues, it
often won't stop rx until a full reset is issued. In that case the hardware
must keep a valid descriptor, otherwise it will write to random places in
system RAM, triggering random crashes. To fix this, keep a dummy descriptor
without a buffer that keeps the DMA engine in a sane state until the reset
is done

SVN-Revision: 27895
 2011-08-04 17:36:27 +00:00
Felix Fietkau
500c3a1475 ar71xx: fix MAC/MDIO reset mask handling 
SVN-Revision: 27894
 2011-08-04 17:36:23 +00:00
Felix Fietkau
c7173a211d ar71xx: reinitialize global switch settings after reset on ar7240 
SVN-Revision: 27705
 2011-07-20 14:39:47 +00:00
Felix Fietkau
ca473833c4 ar71xx: configure address aging on ar7240 
SVN-Revision: 27704
 2011-07-20 14:39:42 +00:00
Felix Fietkau
fefc79f3cb ar71xx: reset the phy in the ethernet init on ar724x 
SVN-Revision: 27703
 2011-07-20 12:04:34 +00:00
Felix Fietkau
005fe5d1fd ar71xx: make sure that rx and interrupts are disabled before issuing the hardware reset 
SVN-Revision: 27702
 2011-07-20 12:04:29 +00:00
Felix Fietkau
e7ab000008 ar71xx: increase the delay after the ethernet MAC reset 
SVN-Revision: 27701
 2011-07-20 12:04:25 +00:00
Felix Fietkau
255dcaa3a6 ar71xx: fix an unused variable warning 
SVN-Revision: 27700
 2011-07-20 12:04:20 +00:00
Felix Fietkau
f3d693c0ee ar71xx: do not reset the hardware on transmit timeout - this would mess up the up the PHY state 
SVN-Revision: 27568
 2011-07-09 06:30:13 +00:00
Felix Fietkau
2806c75c07 ag71xx: keep the rx engine stopped while the link is not up, should hopefully fix stability issues from #9405 
SVN-Revision: 27567
 2011-07-09 06:29:46 +00:00
Gabor Juhos
d98476c6bd ar71xx: merge 2.6.39 patches 
Also remove the old UART driver for ar933x.

SVN-Revision: 27314
 2011-06-29 08:57:37 +00:00
Gabor Juhos
6627574e57 ar71xx: add 2.6.39 support 
SVN-Revision: 27310
 2011-06-29 08:57:32 +00:00
Gabor Juhos
e6af77a1c8 ar71xx: cleanup AR933X UART driver 
SVN-Revision: 27222
 2011-06-19 13:17:51 +00:00
Gabor Juhos
b7e016ba42 ar71xx: use ar933x_uart.h in the AR933X serial driver 
SVN-Revision: 27166
 2011-06-13 08:12:40 +00:00
Gabor Juhos
13363d9129 ar71xx: setup wdt_clock for AR913X to avoid a kernel bug 
Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>

SVN-Revision: 27102
 2011-06-04 12:30:10 +00:00
Felix Fietkau
31dd60689e Revert "ar71xx: only enable the rx engine after the link is up..." 
It messes up the DMA state when the link goes down

SVN-Revision: 27088
 2011-06-01 18:15:43 +00:00
Gabor Juhos
b460bc6f12 ar71xx: add serial driver for the AR933X UART 
SVN-Revision: 27065
 2011-05-31 22:53:40 +00:00
Gabor Juhos
88c45e3130 ar71xx: the watchdog uses the reference clock on the AR933x SoCs 
SVN-Revision: 27060
 2011-05-31 22:53:34 +00:00
Gabor Juhos
0677e16248 ar71xx: Fix header offset for newer WRT160NL models 
Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K,
resulting in miscalculated partition sizes.
Since the actual sizes did not change, hardcode them to their current
sizes, and make sure they are at least one erase block big (in case Cisco
decides to start to use chips with 128K erase blocks).

Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>

SVN-Revision: 27049
 2011-05-31 22:53:20 +00:00
Gabor Juhos
60d5abbc27 ar71xx: ag71xx: make ring sizes configurable via ethtool 
SVN-Revision: 27041
 2011-05-31 22:53:10 +00:00
Gabor Juhos
7a2651f633 ar71xx: ag71xx: prepare to make ring sizes configurable 
SVN-Revision: 27040
 2011-05-31 22:53:09 +00:00
Gabor Juhos
669aba3871 ar71xx: ag71xx: nuke unused AG71XX_TX_FIFO_LEN define 
Reported-by: Dave Täht <dave.taht@gmail.com>

SVN-Revision: 27039
 2011-05-31 22:53:07 +00:00
Felix Fietkau
2b5402d128 ar71xx: only enable the rx engine after the link is up, fixes a race condition that got rx stuck when the interface is brought up during lots of inbound traffic (thx, matteo) 
SVN-Revision: 27035
 2011-05-30 23:08:01 +00:00
Felix Fietkau
0ebc93831f ar71xx: disable flow control for ar724x, it can get stuck in a loop of continously sending MAC pause frames 
SVN-Revision: 27034
 2011-05-30 23:07:57 +00:00
Matteo Croce
4deecea26b ar71xx: detect link on LAN ports 
SVN-Revision: 26922
 2011-05-17 11:12:56 +00:00
Matteo Croce
c0c2e18452 use correct macros and frame size in ag71xx 
SVN-Revision: 26890
 2011-05-14 23:10:06 +00:00
Gabor Juhos
5d77f370d6 ar71xx: ag71xx: make switch register access atomic 
Reading of the PHY registers occasionally returns with bogus values
under heavy load. This misleads the PHY driver and thus causes false
link/speed change notifications which leads to performance loss.

This is easily noticable during an iperf session:

...
[  3] 52.0-53.0 sec  11.3 MBytes  94.4 Mbits/sec
[  3] 53.0-54.0 sec  11.4 MBytes  95.4 Mbits/sec
eth1: link down
br-lan: port 2(eth1) entering forwarding state
eth1: link up (100Mbps/Full duplex)
br-lan: port 2(eth1) entering forwarding state
br-lan: port 2(eth1) entering forwarding state
[  3] 54.0-55.0 sec  6.75 MBytes  56.6 Mbits/sec
[  3] 55.0-56.0 sec  0.00 Bytes  0.00 bits/sec
[  3] 56.0-57.0 sec  10.5 MBytes  88.1 Mbits/sec
...
[  3] 169.0-170.0 sec  11.4 MBytes  95.4 Mbits/sec
[  3] 170.0-171.0 sec  11.4 MBytes  95.4 Mbits/sec
eth1: link up (10Mbps/Half duplex)
[  3] 171.0-172.0 sec  7.63 MBytes  64.0 Mbits/sec
[  3] 172.0-173.0 sec  9.38 MBytes  78.6 Mbits/sec
eth1: link up (100Mbps/Full duplex)
[  3] 173.0-174.0 sec  11.3 MBytes  94.4 Mbits/sec
[  3] 174.0-175.0 sec  11.4 MBytes  95.4 Mbits/sec

SVN-Revision: 26856
 2011-05-08 16:32:53 +00:00
Gabor Juhos
3711658281 ar71xx: ag71xx: fix section mismatch warnings 
The function __devinit ag71xx_probe() references
a function __devexit ag71xx_phy_disconnect().
This is often seen when error handling in the init function
uses functionality in the exit path.
The fix is often to remove the __devexit annotation of
ag71xx_phy_disconnect() so it may be used outside an exit section.

The function ag71xx_phy_disconnect() references a function in an exit
section.
Often the function ag71xx_ar7240_cleanup() has valid usage outside the
exit section
and the fix is to remove the __devexit annotation of
ag71xx_ar7240_cleanup.

SVN-Revision: 26855
 2011-05-08 13:30:36 +00:00
Gabor Juhos
ef53029870 ar71xx: ag71xx: fix build error if debugfs is enabled 
SVN-Revision: 26854
 2011-05-08 13:30:26 +00:00
Gabor Juhos
8b67d748cb ar71xx: ag71xx: add debugfs entry for [rt]x_ring 
SVN-Revision: 26845
 2011-05-07 12:40:34 +00:00
Gabor Juhos
2166432ba0 ar71xx: ag71xx: add timestamps to ag71xx_buf 
SVN-Revision: 26844
 2011-05-07 12:40:28 +00:00
Gabor Juhos
896e1d1ab4 ar71xx: ag71xx: use dynamically allocated buffer for napi_stats 
SVN-Revision: 26843
 2011-05-07 12:40:26 +00:00
Gabor Juhos
a6708d20d1 ar71xx: ag71xx: use debugfs_remove_recursive 
SVN-Revision: 26842
 2011-05-07 12:40:25 +00:00
Gabor Juhos
a8bf5e3cdb ar71xx: rename ar934x_ref_freq to ar71xx_ref_freq 
Also initialize that for each SoC and print its value along with the
other frequencies.

SVN-Revision: 26561
 2011-04-09 18:47:52 +00:00
Gabor Juhos
2b064bb398 ar71xx: add support for the watchdog of the AR934x SoCs 
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com>

SVN-Revision: 26516
 2011-04-07 20:53:10 +00:00
Felix Fietkau
41ee4a283c ar71xx: only allow internal access to the ar7240 switch, export the MDIO bus behind the switch instead 
SVN-Revision: 26393
 2011-04-02 00:47:29 +00:00