ar71xx: ag71xx: remove MII interface setup code
SVN-Revision: 29011
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da64ce8603
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3 changed files with 0 additions and 16 deletions
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@ -23,7 +23,6 @@ struct ag71xx_platform_data {
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int speed;
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int duplex;
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u32 reset_bit;
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u32 mii_if;
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u8 mac_addr[ETH_ALEN];
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struct device *mii_bus_dev;
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@ -343,7 +343,6 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
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#define RX_STATUS_OF BIT(2) /* Rx Overflow */
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#define RX_STATUS_BE BIT(3) /* Bus Error */
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#define MII_CTRL_IF_MASK 3
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#define MII_CTRL_SPEED_SHIFT 4
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#define MII_CTRL_SPEED_MASK 3
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#define MII_CTRL_SPEED_10 0
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@ -436,17 +435,6 @@ static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)
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return __raw_readl(ag->mii_ctrl);
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}
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static inline void ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
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unsigned int mii_if)
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{
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u32 t;
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t = ag71xx_mii_ctrl_rr(ag);
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t &= ~(MII_CTRL_IF_MASK);
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t |= (mii_if & MII_CTRL_IF_MASK);
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ag71xx_mii_ctrl_wr(ag, t);
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}
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static inline void ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
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unsigned int speed)
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{
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@ -444,9 +444,6 @@ static void ag71xx_hw_setup(struct ag71xx *ag)
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/* setup max frame length */
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ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN);
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/* setup MII interface type */
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ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
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/* setup FIFO configuration registers */
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
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if (pdata->is_ar724x) {
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