ar71xx: cleanup AR933X UART driver
SVN-Revision: 27222
This commit is contained in:
Gabor Juhos
parent
066e04d497
commit
e6af77a1c8
2 changed files with 156 additions and 487 deletions
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@ -11,6 +11,9 @@
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#ifndef __AR933X_UART_H
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#define __AR933X_UART_H
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#define AR933X_UART_REGS_SIZE 20
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#define AR933X_UART_FIFO_SIZE 16
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#define AR933X_UART_DATA_REG 0x00
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#define AR933X_UART_CS_REG 0x04
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#define AR933X_UART_CLOCK_REG 0x08
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@ -23,9 +26,14 @@
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#define AR933X_UART_CS_PARITY_S 0
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#define AR933X_UART_CS_PARITY_M 0x3
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#define AR933X_UART_CS_PARITY_M 0x3
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#define AR933X_UART_CS_PARITY_NONE 0
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#define AR933X_UART_CS_PARITY_ODD 1
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#define AR933X_UART_CS_PARITY_EVEN 2
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#define AR933X_UART_CS_IF_MODE_S 2
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#define AR933X_UART_CS_IF_MODE_M 0x3
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#define AR933X_UART_CS_IF_MODE_NONE 0
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#define AR933X_UART_CS_IF_MODE_DTE 1
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#define AR933X_UART_CS_IF_MODE_DCE 2
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#define AR933X_UART_CS_FLOW_CTRL_S 4
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#define AR933X_UART_CS_FLOW_CTRL_M 0x3
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#define AR933X_UART_CS_DMA_EN BIT(6)
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@ -41,7 +49,8 @@
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#define AR933X_UART_CLOCK_STEP_M 0xffff
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#define AR933X_UART_CLOCK_SCALE_M 0xfff
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#define AR933X_UART_CLCOK_SCALE_S 16
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#define AR933X_UART_CLOCK_SCALE_S 16
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#define AR933X_UART_CLOCK_STEP_M 0xffff
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#define AR933X_UART_INT_RX_VALID BIT(0)
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#define AR933X_UART_INT_TX_READY BIT(1)
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@ -1,27 +1,16 @@
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/*
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* linux/drivers/serial/hornet_serial.c
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* Atheros AR933X SoC built-in UART driver
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*
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* Driver for hornet serial ports
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Copyright (C) 2010 Ryan Hsu.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* $Id$
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*
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* A note about mapbase / membase
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*
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* mapbase is the physical address of the IO port.
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* membase is an 'ioremapped' cookie.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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@ -30,77 +19,26 @@
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_reg.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/nmi.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <asm/mach-ar71xx/ar933x_uart.h>
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#include <asm/mach-ar71xx/ar933x_uart_platform.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include "8250.h"
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#define ar7240_reg_rmw_clear(_reg, _val) do {} while (0)
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#define DRIVER_NAME "ar933x-uart"
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#define AR933X_UART_REGS_SIZE 20
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#define AR933X_UART_FIFO_SIZE 16
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/*
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* uncomment below to enable WAR for EV81847.
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*/
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//#define AR933X_EV81847_WAR
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#define AR933X_DUMMY_STATUS_RD 0x01
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static struct uart_driver ar933x_uart_driver;
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/*
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* Debugging.
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*/
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#if 0
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#define DEBUG_AUTOCONF(fmt...) printk(fmt)
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#else
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#define DEBUG_AUTOCONF(fmt...) do { } while (0)
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#endif
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#if 0
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#define DEBUG_INTR(fmt...) printk(fmt)
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#else
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#define DEBUG_INTR(fmt...) do { } while (0)
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#endif
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/*
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* We default to IRQ0 for the "no irq" hack. Some
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* machine types want others as well - they're free
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* to redefine this in their header file.
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*/
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#define is_real_interrupt(irq) ((irq) != 0)
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#include <asm/serial.h>
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struct ar933x_uart_port {
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struct uart_port port;
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struct timer_list timer; /* "no irq" timer */
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unsigned char acr;
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unsigned char ier;
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unsigned char lcr;
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unsigned char mcr;
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unsigned int ier; /* shadow Interrupt Enable Register */
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};
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static inline int ar933x_ev81847_war(void)
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{
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#if defined(AR933X_EV81847_WAR)
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return 1;
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#else
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return 0;
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#endif
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}
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static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
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int offset)
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{
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@ -142,19 +80,23 @@ static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
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static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
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{
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ar933x_uart_rmw_set(up, AR933X_UART_INT_EN_REG,
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AR933X_UART_INT_TX_EMPTY);
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up->ier |= AR933X_UART_INT_TX_EMPTY;
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
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}
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static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
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{
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if (up->ier & UART_IER_THRI) {
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up->ier &= ~UART_IER_THRI;
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up->ier &= ~AR933X_UART_INT_TX_EMPTY;
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG,up->ier);
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}
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/* FIXME: why this uses RXVALIDINTEN? */
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ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
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AR933X_UART_INT_RX_VALID);
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}
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static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
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{
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unsigned int rdata;
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rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
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rdata |= AR933X_UART_DATA_TX_CSR;
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ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
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}
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static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
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@ -197,34 +139,22 @@ static void ar933x_uart_stop_rx(struct uart_port *port)
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{
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struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
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up->ier &= ~UART_IER_RLSI;
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up->port.read_status_mask &= ~UART_LSR_DR;
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ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
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AR933X_UART_INT_RX_VALID);
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up->ier &= ~AR933X_UART_INT_RX_VALID;
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
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}
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static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
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{
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struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
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unsigned long flags;
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unsigned long rdata;
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spin_lock_irqsave(&up->port.lock, flags);
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if (break_state == -1)
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up->lcr |= UART_LCR_SBC;
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
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AR933X_UART_CS_TX_BREAK);
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else
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up->lcr &= ~UART_LCR_SBC;
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rdata = ar933x_uart_read(up, AR933X_UART_CS_REG);
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if (up->lcr & UART_LCR_SBC)
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rdata |= AR933X_UART_CS_TX_BREAK;
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else
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rdata &= ~AR933X_UART_CS_TX_BREAK;
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ar933x_uart_write(up, AR933X_UART_CS_REG, rdata);
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ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
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AR933X_UART_CS_TX_BREAK);
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spin_unlock_irqrestore(&up->port.lock, flags);
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}
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@ -232,393 +162,168 @@ static void ar933x_uart_enable_ms(struct uart_port *port)
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{
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}
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static inline unsigned int ar933x_uart_get_divisor(struct uart_port *port,
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unsigned int baud)
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{
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return (port->uartclk / (16 * baud)) - 1;
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}
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static void ar933x_uart_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *new,
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struct ktermios *old)
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{
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struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
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unsigned char cval;
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unsigned int cs;
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unsigned long flags;
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unsigned int baud, quot;
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unsigned int baud, scale;
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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cval = UART_LCR_WLEN5;
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break;
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case CS6:
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cval = UART_LCR_WLEN6;
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break;
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case CS7:
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cval = UART_LCR_WLEN7;
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break;
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default:
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case CS8:
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cval = UART_LCR_WLEN8;
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break;
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}
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/* Only CS8 is supported */
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new->c_cflag &= ~CSIZE;
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new->c_cflag |= CS8;
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if (termios->c_cflag & CSTOPB)
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cval |= UART_LCR_STOP;
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if (termios->c_cflag & PARENB)
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cval |= UART_LCR_PARITY;
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if (!(termios->c_cflag & PARODD))
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cval |= UART_LCR_EPAR;
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#ifdef CMSPAR
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if (termios->c_cflag & CMSPAR)
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cval |= UART_LCR_SPAR;
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#endif
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/* Only one stop bit is supported */
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new->c_cflag &= ~CSTOPB;
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/*
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* Ask the core to calculate the divisor for us.
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*/
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
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quot = ar933x_uart_get_divisor(port, baud);
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#if 0
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if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
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if (baud < 2400)
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fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
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cs = 0;
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if (new->c_cflag & PARENB) {
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if (!(new->c_cflag & PARODD))
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cs |= AR933X_UART_CS_PARITY_EVEN;
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else
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fcr = uart_config[up->port.type].fcr;
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cs |= AR933X_UART_CS_PARITY_ODD;
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} else {
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cs |= AR933X_UART_CS_PARITY_NONE;
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}
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/*
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* MCR-based auto flow control. When AFE is enabled, RTS will be
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* deasserted when the receive FIFO contains more characters than
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* the trigger, or the MCR RTS bit is cleared. In the case where
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* the remote UART is not using CTS auto flow control, we must
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* have sufficient FIFO entries for the latency of the remote
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* UART to respond. IOW, at least 32 bytes of FIFO.
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*/
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if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
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up->mcr &= ~UART_MCR_AFE;
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if (termios->c_cflag & CRTSCTS)
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up->mcr |= UART_MCR_AFE;
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}
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#endif
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/* Mark/space parity is not supported */
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new->c_cflag &= ~CMSPAR;
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baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
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scale = (port->uartclk / (16 * baud)) - 1;
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/*
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* Ok, we're now changing the port state. Do it with
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* Ok, we're now changing the port state. Do it with
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* interrupts disabled.
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*/
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spin_lock_irqsave(&up->port.lock, flags);
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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/* Update the per-port timeout. */
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uart_update_timeout(port, new->c_cflag, baud);
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up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
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if (termios->c_iflag & INPCK)
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up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
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if (termios->c_iflag & (BRKINT | PARMRK))
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up->port.read_status_mask |= UART_LSR_BI;
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/*
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* Characteres to ignore
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*/
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up->port.ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
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if (termios->c_iflag & IGNBRK) {
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up->port.ignore_status_mask |= UART_LSR_BI;
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns too (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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up->port.ignore_status_mask |= UART_LSR_OE;
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}
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/*
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* ignore all characters if CREAD is not set
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*/
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if ((termios->c_cflag & CREAD) == 0)
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up->port.ignore_status_mask |= UART_LSR_DR;
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/* ignore all characters if CREAD is not set */
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if ((new->c_cflag & CREAD) == 0)
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up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
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/*
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* CTS flow control flag and modem status interrupts
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*/
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up->ier &= ~UART_IER_MSI;
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if (UART_ENABLE_MS(&up->port, termios->c_cflag))
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up->ier |= UART_IER_MSI;
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ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
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scale << AR933X_UART_CLOCK_SCALE_S | 8192);
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/* setup configuration register */
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ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
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/* enable host interrupt */
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
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AR933X_UART_CS_HOST_INT_EN);
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/* Save LCR */
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up->lcr = cval;
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ar933x_uart_set_mctrl(&up->port, up->port.mctrl);
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spin_unlock_irqrestore(&up->port.lock, flags);
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if (tty_termios_baud_rate(new))
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tty_termios_encode_baud_rate(new, baud, baud);
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}
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static void ar933x_uart_rx_chars(struct ar933x_uart_port *up, int *status)
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static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
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{
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struct tty_struct *tty = up->port.state->port.tty;
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unsigned int lsr = *status;
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unsigned char ch;
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int max_count = 256;
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char flag;
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do {
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ch = lsr & AR933X_UART_DATA_TX_RX_MASK;
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unsigned int rdata;
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unsigned char ch;
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rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
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if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
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break;
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/* remove the character from the FIFO */
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ar933x_uart_write(up, AR933X_UART_DATA_REG,
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AR933X_UART_DATA_RX_CSR);
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flag = TTY_NORMAL;
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up->port.icount.rx++;
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lsr = AR933X_UART_DATA_RX_CSR;
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ar933x_uart_write(up, AR933X_UART_DATA_REG, lsr);
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if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
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UART_LSR_FE | UART_LSR_OE))) {
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/*
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* For statistics only
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*/
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if (lsr & UART_LSR_BI) {
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lsr &= ~(UART_LSR_FE | UART_LSR_PE);
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up->port.icount.brk++;
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/*
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* We do the SysRQ and SAK checking
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* here because otherwise the break
|
||||
* may get masked by ignore_status_mask
|
||||
* or read_status_mask.
|
||||
*/
|
||||
if (uart_handle_break(&up->port))
|
||||
goto ignore_char;
|
||||
} else if (lsr & UART_LSR_PE)
|
||||
up->port.icount.parity++;
|
||||
else if (lsr & UART_LSR_FE)
|
||||
up->port.icount.frame++;
|
||||
if (lsr & UART_LSR_OE)
|
||||
up->port.icount.overrun++;
|
||||
|
||||
/*
|
||||
* Mask off conditions which should be ignored.
|
||||
*/
|
||||
lsr &= up->port.read_status_mask;
|
||||
|
||||
if (lsr & UART_LSR_BI) {
|
||||
DEBUG_INTR("handling break....");
|
||||
flag = TTY_BREAK;
|
||||
} else if (lsr & UART_LSR_PE)
|
||||
flag = TTY_PARITY;
|
||||
else if (lsr & UART_LSR_FE)
|
||||
flag = TTY_FRAME;
|
||||
}
|
||||
ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
|
||||
|
||||
if (uart_handle_sysrq_char(&up->port, ch))
|
||||
goto ignore_char;
|
||||
continue;
|
||||
|
||||
uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
|
||||
if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
|
||||
tty_insert_flip_char(tty, ch, TTY_NORMAL);
|
||||
} while (max_count-- > 0);
|
||||
|
||||
ignore_char:
|
||||
lsr = ar933x_uart_read(up, AR933X_UART_DATA_REG);
|
||||
} while ((lsr & AR933X_UART_DATA_RX_CSR) && (max_count-- > 0));
|
||||
|
||||
spin_unlock(&up->port.lock);
|
||||
tty_flip_buffer_push(tty);
|
||||
spin_lock(&up->port.lock);
|
||||
|
||||
*status = lsr;
|
||||
}
|
||||
|
||||
static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
|
||||
{
|
||||
struct circ_buf *xmit = &up->port.state->xmit;
|
||||
int count;
|
||||
unsigned int rdata;
|
||||
|
||||
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
|
||||
if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
if (uart_tx_stopped(&up->port))
|
||||
return;
|
||||
}
|
||||
|
||||
if (up->port.x_char) {
|
||||
rdata = up->port.x_char & AR933X_UART_DATA_TX_RX_MASK;
|
||||
rdata |= AR933X_UART_DATA_TX_CSR;
|
||||
ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
|
||||
up->port.icount.tx++;
|
||||
up->port.x_char = 0;
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
return;
|
||||
}
|
||||
|
||||
if (uart_tx_stopped(&up->port)) {
|
||||
ar933x_uart_stop_tx(&up->port);
|
||||
return;
|
||||
}
|
||||
|
||||
if (uart_circ_empty(xmit)) {
|
||||
ar933x_uart_stop_tx_interrupt(up);
|
||||
return;
|
||||
}
|
||||
|
||||
count = up->port.fifosize / 4;
|
||||
count = up->port.fifosize;
|
||||
do {
|
||||
unsigned int rdata;
|
||||
|
||||
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
|
||||
if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
return;
|
||||
if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
|
||||
break;
|
||||
|
||||
if (up->port.x_char) {
|
||||
ar933x_uart_putc(up, up->port.x_char);
|
||||
up->port.icount.tx++;
|
||||
up->port.x_char = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
rdata = xmit->buf[xmit->tail] & AR933X_UART_DATA_TX_RX_MASK;
|
||||
rdata |= AR933X_UART_DATA_TX_CSR;
|
||||
ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
|
||||
ar933x_uart_putc(up, xmit->buf[xmit->tail]);
|
||||
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
up->port.icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
} while (--count > 0);
|
||||
|
||||
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
|
||||
if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Re-enable TX Empty Interrupt to transmit pending chars */
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(&up->port);
|
||||
|
||||
if (!uart_circ_empty(xmit))
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
}
|
||||
|
||||
DEBUG_INTR("THRE...");
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
ar933x_uart_stop_tx_interrupt(up);
|
||||
else
|
||||
ar933x_uart_start_tx_interrupt(up);
|
||||
}
|
||||
|
||||
/*! Hornet's interrupt status is not read clear, so that we have to...
|
||||
* a. read out the interrupt status
|
||||
* b. clear the interrupt mask to reset the interrupt status
|
||||
* c. enable the interrupt to reactivate interrupt
|
||||
*
|
||||
* Disable and clear the interrupt status
|
||||
*/
|
||||
static inline void ar933x_uart_clear_int(struct ar933x_uart_port *up)
|
||||
{
|
||||
#define BIT3 (0x1>>3)
|
||||
|
||||
/* 1. clear MISC interrupt mask */
|
||||
//ar7240_reg_rmw_clear(AR7240_MISC_INT_MASK, BIT3);
|
||||
|
||||
/* 2. clear uartcs hostinten mask, bit13 */
|
||||
ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
|
||||
AR933X_UART_CS_HOST_INT_EN);
|
||||
|
||||
/* 3. clear rx uartint */
|
||||
ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
|
||||
|
||||
/* 4. clear misc interrupt status */
|
||||
ar7240_reg_rmw_clear(AR7240_MISC_INT_STATUS, BIT3);
|
||||
|
||||
/* 5. clear rx uartinten*/
|
||||
ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
|
||||
AR933X_UART_INT_RX_VALID);
|
||||
|
||||
/* 6. enable rx int*/
|
||||
ar933x_uart_rmw_set(up, AR933X_UART_INT_EN_REG,
|
||||
AR933X_UART_INT_RX_VALID);
|
||||
|
||||
/* 7. set uartcs hostinten mask */
|
||||
ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
|
||||
AR933X_UART_CS_HOST_INT_EN);
|
||||
|
||||
/* 8. set misc int mask */
|
||||
//ar7240_reg_wr(AR7240_MISC_INT_MASK, BIT3);
|
||||
}
|
||||
|
||||
static inline void ar933x_uart_handle_port(struct ar933x_uart_port *up)
|
||||
{
|
||||
unsigned int status;
|
||||
unsigned int int_status;
|
||||
unsigned int en_status;
|
||||
unsigned long flags;
|
||||
|
||||
status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
|
||||
int_status = ar933x_uart_read(up, AR933X_UART_INT_REG);
|
||||
en_status = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
|
||||
if( (int_status & en_status) & AR933X_UART_INT_RX_VALID )
|
||||
ar933x_uart_rx_chars(up, &status);
|
||||
|
||||
if (((int_status & en_status) & AR933X_UART_INT_TX_EMPTY)) {
|
||||
/* clear TX empty interrupts */
|
||||
ar933x_uart_write(up, AR933X_UART_INT_REG,
|
||||
AR933X_UART_INT_TX_EMPTY);
|
||||
|
||||
/* disable TX empty interrupts */
|
||||
ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
|
||||
AR933X_UART_INT_TX_EMPTY);
|
||||
|
||||
if (!uart_circ_empty(&up->port.state->xmit))
|
||||
ar933x_uart_tx_chars(up);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
}
|
||||
|
||||
static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct ar933x_uart_port *up;
|
||||
unsigned int iir;
|
||||
struct ar933x_uart_port *up = dev_id;
|
||||
unsigned int status;
|
||||
|
||||
up = (struct ar933x_uart_port *) dev_id;
|
||||
|
||||
iir = ar933x_uart_read(up, AR933X_UART_CS_REG);
|
||||
if ((iir & AR933X_UART_CS_HOST_INT) == 0)
|
||||
status = ar933x_uart_read(up, AR933X_UART_CS_REG);
|
||||
if ((status & AR933X_UART_CS_HOST_INT) == 0)
|
||||
return IRQ_NONE;
|
||||
|
||||
DEBUG_INTR("ar933x_uart_interrupt(%d)...", irq);
|
||||
|
||||
spin_lock(&up->port.lock);
|
||||
ar933x_uart_handle_port(up);
|
||||
ar933x_uart_clear_int(up);
|
||||
spin_unlock(&up->port.lock);
|
||||
|
||||
DEBUG_INTR("end.\n");
|
||||
status = ar933x_uart_read(up, AR933X_UART_INT_REG);
|
||||
status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void ar933x_uart_timer(unsigned long data)
|
||||
{
|
||||
struct uart_port *port = (void *)data;
|
||||
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
|
||||
unsigned int iir;
|
||||
|
||||
if (ar933x_ev81847_war()) {
|
||||
struct circ_buf *xmit = &up->port.state->xmit;
|
||||
unsigned long flags;
|
||||
|
||||
if (!uart_circ_empty(xmit)) {
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
ar933x_uart_tx_chars(up);
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
}
|
||||
} else {
|
||||
iir = ar933x_uart_read(up, AR933X_UART_CS_REG);
|
||||
if (iir & AR933X_UART_CS_HOST_INT) {
|
||||
spin_lock(&up->port.lock);
|
||||
ar933x_uart_handle_port(up);
|
||||
spin_unlock(&up->port.lock);
|
||||
}
|
||||
if (status & AR933X_UART_INT_RX_VALID) {
|
||||
ar933x_uart_write(up, AR933X_UART_INT_REG,
|
||||
AR933X_UART_INT_RX_VALID);
|
||||
ar933x_uart_rx_chars(up);
|
||||
}
|
||||
|
||||
mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
|
||||
if (status & AR933X_UART_INT_TX_EMPTY) {
|
||||
ar933x_uart_write(up, AR933X_UART_INT_REG,
|
||||
AR933X_UART_INT_TX_EMPTY);
|
||||
ar933x_uart_stop_tx_interrupt(up);
|
||||
ar933x_uart_tx_chars(up);
|
||||
}
|
||||
|
||||
spin_unlock(&up->port.lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int ar933x_uart_startup(struct uart_port *port)
|
||||
|
|
@ -632,39 +337,15 @@ static int ar933x_uart_startup(struct uart_port *port)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
up->mcr = 0;
|
||||
|
||||
/*
|
||||
* Clear the interrupt registers.
|
||||
*/
|
||||
ar933x_uart_read(up, AR933X_UART_CS_REG);
|
||||
ar933x_uart_read(up, AR933X_UART_INT_REG);
|
||||
|
||||
if (!is_real_interrupt(up->port.irq) || ar933x_ev81847_war()) {
|
||||
setup_timer(&up->timer, ar933x_uart_timer, (unsigned long)port);
|
||||
mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
|
||||
return 0;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
|
||||
/*
|
||||
* Enable host interrupts
|
||||
*/
|
||||
/* Enable HOST interrupts */
|
||||
ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
|
||||
AR933X_UART_CS_HOST_INT_EN);
|
||||
|
||||
/*
|
||||
* Enable RX interrupts
|
||||
*/
|
||||
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG,
|
||||
AR933X_UART_INT_RX_VALID);
|
||||
|
||||
/*
|
||||
* And clear the interrupt registers again for luck.
|
||||
*/
|
||||
ar933x_uart_read(up, AR933X_UART_INT_REG);
|
||||
/* Enable RX interrupts */
|
||||
up->ier = AR933X_UART_INT_RX_VALID;
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
|
||||
|
|
@ -674,29 +355,15 @@ static int ar933x_uart_startup(struct uart_port *port)
|
|||
static void ar933x_uart_shutdown(struct uart_port *port)
|
||||
{
|
||||
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Disable all interrupts from this port
|
||||
*/
|
||||
/* Disable all interrupts */
|
||||
up->ier = 0;
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
up->port.mctrl &= ~TIOCM_OUT2;
|
||||
ar933x_uart_set_mctrl(&up->port, up->port.mctrl);
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
|
||||
/*
|
||||
* Disable break condition
|
||||
*/
|
||||
/* Disable break condition */
|
||||
ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
|
||||
AR933X_UART_CS_TX_BREAK);
|
||||
|
||||
if (!is_real_interrupt(up->port.irq) ||
|
||||
ar933x_ev81847_war())
|
||||
del_timer_sync(&up->timer);
|
||||
|
||||
free_irq(up->port.irq, up);
|
||||
}
|
||||
|
||||
|
|
@ -718,20 +385,24 @@ static int ar933x_uart_request_port(struct uart_port *port)
|
|||
|
||||
static void ar933x_uart_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
|
||||
|
||||
port->type = PORT_AR933X;
|
||||
|
||||
/* Clear mask, so no surprise interrupts. */
|
||||
ar933x_uart_read(up, AR933X_UART_CS_REG);
|
||||
/* Clear interrupts status register */
|
||||
ar933x_uart_read(up, AR933X_UART_INT_REG);
|
||||
if (flags & UART_CONFIG_TYPE)
|
||||
port->type = PORT_AR933X;
|
||||
}
|
||||
|
||||
static int ar933x_uart_verify_port(struct uart_port *port,
|
||||
struct serial_struct *ser)
|
||||
{
|
||||
return -EINVAL;
|
||||
if (ser->type != PORT_UNKNOWN &&
|
||||
ser->type != PORT_AR933X)
|
||||
return -EINVAL;
|
||||
|
||||
if (ser->irq < 0 || ser->irq >= NR_IRQS)
|
||||
return -EINVAL;
|
||||
|
||||
if (ser->baud_base < 28800)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct uart_ops ar933x_uart_ops = {
|
||||
|
|
@ -774,13 +445,9 @@ static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
|
|||
static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
|
||||
{
|
||||
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
|
||||
unsigned int rdata;
|
||||
|
||||
ar933x_uart_wait_xmitr(up);
|
||||
|
||||
rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
|
||||
rdata |= AR933X_UART_DATA_TX_CSR;
|
||||
ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
|
||||
ar933x_uart_putc(up, ch);
|
||||
}
|
||||
|
||||
static void ar933x_uart_console_write(struct console *co, const char *s,
|
||||
|
|
@ -788,22 +455,22 @@ static void ar933x_uart_console_write(struct console *co, const char *s,
|
|||
{
|
||||
struct ar933x_uart_port *up = ar933x_console_ports[co->index];
|
||||
unsigned long flags;
|
||||
unsigned int ier;
|
||||
unsigned int int_en;
|
||||
int locked = 1;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
if (up->port.sysrq) {
|
||||
if (up->port.sysrq)
|
||||
locked = 0;
|
||||
} else if (oops_in_progress) {
|
||||
else if (oops_in_progress)
|
||||
locked = spin_trylock(&up->port.lock);
|
||||
} else
|
||||
else
|
||||
spin_lock(&up->port.lock);
|
||||
|
||||
/*
|
||||
* First save the IER then disable the interrupts
|
||||
*/
|
||||
ier = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
|
||||
int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
|
||||
|
||||
uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
|
||||
|
|
@ -813,8 +480,8 @@ static void ar933x_uart_console_write(struct console *co, const char *s,
|
|||
* and restore the IER
|
||||
*/
|
||||
ar933x_uart_wait_xmitr(up);
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
|
||||
|
||||
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, ier);
|
||||
ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
|
||||
|
||||
if (locked)
|
||||
|
|
@ -854,13 +521,6 @@ static struct console ar933x_uart_console = {
|
|||
.data = &ar933x_uart_driver,
|
||||
};
|
||||
|
||||
static int __init ar933x_uart_console_init(void)
|
||||
{
|
||||
register_console(&ar933x_uart_console);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(ar933x_uart_console_init);
|
||||
|
||||
static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
|
||||
{
|
||||
ar933x_console_ports[up->port.line] = up;
|
||||
|
|
@ -1015,4 +675,4 @@ module_exit(ar933x_uart_exit);
|
|||
MODULE_DESCRIPTION("Atheros AR933X UART driver");
|
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
MODULE_ALIAS("platform:" DRIVER_NAME);
|
||||
|
|
|
|||
Loading…
Reference in a new issue