It seems that the PCI controller does not support I/O ports, so remove
the ports range. Also correct the beginning of the memory range and its
size.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42503
Use __raw_{read,write}l accessors and use Abort interrupt to detect a
configuration space read/write errors. The second change improves errors
detection, what improves the device presence detection and helps us to
avoid following (and similar) errors:
pci 0000:00:00.2: ignoring class 0x7e0200 (doesn't match header type 02)
pci 0000:00:00.2: bridge configuration invalid ([bus 03-90]), reconfiguring
pci 0000:00:00.2: not setting up bridge for bus 0000:01
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42502
Add PCI IRQ controller to facilitate interrupt handling, move interrupts
initialization to the IRQ controller initialization from
pcibios_plat_dev_init() callback.
Also remove odd PCI dev configuration manipulation from pcibios_plat_dev_init()
callback.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42501
Explicitly configure PCI host controller, and do not expose it to PCI
subsystem. The PCI host controller acts as a usual PCI device connected
to the bus, but its configuration as a usual PCI device is senseless,
since the host controller provide access to _internal_ memory space for
_external_ device.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42500
- add comment, which briefly describes PCI controller features and
Fonera 2.0g schematics.
- rename several functions and structures, to make it clear that this
code only for AR2315 chips.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42499
Caller (generic PCI code) already do proper locking so no need to add
another one here.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42498
Remove options which already selected by ATHEROS_AR231X on which
ATHEROS_AR2315 depends.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42497
- remove odd flags and branching
- add __init mark
- make shorter variables names
- returns true or false from boolean functions
- unwrap short function declarations
- unwrap quoted string
- rename macroses with names in CamelCase
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42495
- use ether_foo() routines to work with addresses
- use ETH_ALEN inplace of magic '6'
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42494
Use mutex inplace of spinlock to make code simple, also call
mutex_{lock,unlock} explicitly to avoid sparse warning about context
imbalance.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42491
Remove FSF mailing address as suggested by checkpach and place license
URL.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42487
Missing this headers cause several sparse "symbol 'foo' was not
declared. Should it be static?" warnings.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42483
This switches to kernel 3.10 that was prepared by Hauke in r41531 :
gemini: add support for kernel 3.10
This is compile tested only, please run test and report back.
I've simply checked if it still compiles, unfortunately we didn't get
any feedback for this target.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42450
the old dwc_otg driver is starting to fall apart and fails on newer 3g
modems and some storage devices. switch to the upstream dwc2 driver which
is no longer in staging/.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42446
While the AR9331 has a gigabit MAC towards the internal switch, the
integrated PHYs however are only 100-base-tx capable. The existing code
however advertieses gigabit capability in the link status word. If you
attach such a PHY to a gigabit capable switch on the remote end, with
some probability it attempts to negotiate gigabit and fails, falling
baco to the AR9331 assuming a 10mbit half-duplex link. This has been
observed quite frequently with the Carambola2 and gigabit capable
switches.
In ath79_register_eth(), "pdata->has_gbit = 1;" is set unconditionally
for both AR9331 ethernet ports. This is most likely wrong. Despite the
two MAC IP cores being gigabit MACs, the MAC for eth1 is connected to a
100base-T PHY via MII. The has_gbit attribute is used in the ethernet
driver to determine the supported link modes.
So either pdata->has_gbit is not set to 1 anymore, or the ethernet
driver needs to be modified to determine the advertised link code word
on another criteria than pdata->has_gbit. This patch implements the
former solution.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
SVN-Revision: 42432
Some Kconfig options are only relevant for the legacy platforms, move
them where they belong
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42416
We need a new kernel version to support Cortex-A5 based platforms such
as SAMA5GD3.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42415
In preparation for adding 3.14 kernel support, move files and patches to
a separate per-version directory since some of them will have
incompatible changes (e.g: dts)
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42413
In preparation for adding SAMA5D3 support, move the legacy ARMv5 based
platforms to a separate subtarget.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42408
The cns3xxx uses irq61 for pcie0_intr which in the case of a PCIe-to-PCI
bridge ends up combining INTA/B/C/D on a single ARM CPU interrupt. This is
not optimal when you have multiple cores. To overcome this limitation an
enhancement was made on newer Laguna PCB's that support miniPCI cards
to route the INTA/B/C/D signals to unique external ARM CPU interrupts which
can help balance CPU core utilization and in some cases increase overall
system performance or responsiveness.
For more details see:
http://trac.gateworks.com/wiki/multicoreprocessing#PCIInterruptsteering
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42400
Patches are generated using the "format-patch" command from the
following location:
*https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base
*rev=0771849495b4128cac2faf7d49c85c729fc48b20
Patches numbered 76/77/102/103 have already been integrated in 3.14.12,
so they're not in this list.
All these patches are either integrated are pending integration into
kernel.org, therefore these patches should go away once the kernel
gets upgraded to 3.16.
Support is currently limited to AP148 board but can be extended to other
platforms in the future.
These changes do not cover ethernet connectivity.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 42334
We were prompted for which DEBUG_LL_UART implementation we want, fix the
typos such that the build continues.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42332
This improves performance when doing concurrent rx/tx on a single
ethernet MAC, e.g. when routing between VLANs.
Fixes#13072
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42328
The bb-rc3 image for the BTHOMEHUBV2B is too big for its
mtd partition. This patch corrects the partition sizes in
the device tree. This patch should really go in before
bb-final, otherwise the BTHOMEHUBV2B images won't be useable.
I do apologise for not spotting this straight away.
Many thanks,
Ben
Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
SVN-Revision: 42316
A previous backported patch that adds freq/voltage operating points for the
IMX6DL processor can cause hang/crash (general instability) on IMX6DL
processors in the industrial/automative speed grades as they don't support
1GHz operation.
This adds another backported patch from mainline that uses IMX6 fuse settings
to properly remove invalid operating points for the particular CPU grade used.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42294
There are pretty many OpenWrt patches against mtd subsystem resulting
in a bit of mess and growing maintenance cost.
My idea is to use an extra "mtdsplit" directory with OpenWrt specific
files (including Kconfig).
This is the first step to achieve this. This patch adds a "mtdsplit"
directory with Kconfig and replaces 4 patches with a single one.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42287
This is based on Jon Smirl's patch with the following changes:
- Set CS polarity as low by default.
- Add support for changing CS polarity.
- Add support for changing LSB/MSB.
- Add support for changing SPI mode.
- Fix indentations.
I tested it on a VoCore. Works fine connected to a second flash, but fails to detect MMC/SD cards due to SPI clock speed.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 42276
This fixes lots of sparse and checkpatch errors and extends the
documentation.
This also fixes a problem in the nvram parser, it now detects the
correct nvram on my Netgear R6250.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 42272
Upstream commit c11eede powerpc: add missing explicit OF includes for ppc was
included in 3.13 and onwards, hence making those patches obsolete.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42263
This prevents generating every supported image, except for de "Default" profile.
Also fixes Neufbox 6 image generation.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42210
Use generic profiles for brcm63xx instead of having similar profiles for
each subtarget.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42208
This changes board info to match the Wiki
http://wiki.openwrt.org/toh/huawei/hg556a, removes the no longer needed
fallback board and fixes HG556 Ralink eeprom extraction.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[jogo: rename partitions instead]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42206
There is a group of devices that lzma-loader doesn't work with. They
simply hang at "Starting program at 0x80001000" which is really hard to
debug and we didn't find any solution for this for years.
Broadcom doesn't use lzma-loader on these devices anyway. They decided
to drop lzma-loader and use less optimal LZMA compression that can be
handled by CFE itself (it doesn't use dictionary).
So support these devices we will need kernel compressed with different
parameters and trx without a loader.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42205
Switch in Edimax 3G-6200n also require full switch reset, not only vlan definitions. Tested on Edimax 3G-6200n.
Signed-off-by: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
SVN-Revision: 42194
This sets the MAC address of the WLAN interface to the "official" primary MAC
address (the one on the label under the devices, and the one used with the stock
firmware). The MAC address used so far (primary-1) isn't even used at all with
the stock firmware, which sets (primary) on LAN and WLAN and (primary+1) on the
WAN interface (like OpenWrt does with this patch).
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
SVN-Revision: 42193
The OpenMesh MR600(v1) can only enable the 2.4G WiFi PHY LED through the
mini-PCIe device. Not configuring the LED pin inside the platform data
makes it impossible to configure it through any standard OpenWrt tool.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 42184
- use full board name
- rename uboot-env partition
- add dsl_fw partition
- remove unneeded pinmux groups
- move gigabit ethernet to LAN
- load mac address from mtd
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 42180
Due to TCP connections not working when VLAN is disabled, this is
needed to get failsafe functional.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 42179
According to the pcb tracing results[1] by anton.rad[2] MPR-A1s expose
6 unused GPIOs, only one of them working as configured in the current
DTS. This patch enables GPIO22-26.
Tested on hardware.
[1] http://i.imgur.com/kHVW2Ox.jpg
[2] https://forum.openwrt.org/viewtopic.php?pid=222698#p222698
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 42178
The conversion was not 100% correct and leads to u-boot failing to
verify the CRC, revert that change for now.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42170
This patch is causing more harm than good on most AR7 routers out there,
better have no manageable switch rather than no ethernet connection, at
least for now.
Fixes#16523, #5927
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42168
The GW5520 is a small form-factor single-board computer with the following
features:
* 70x100mm form-factor
* IMX6DL 800MHz SoC (IMX6Q optional)
* 512MB 32bit DDR3 SDRAM (up to 2GB optional)
* 256MB NAND FLASH (up to 2GB optional)
* Gateworks System Controller
* 2x front-panel Intel i210 GbE adapters with passive PoE support
* 2x MiniPCIe sockets with USB support
* 2x front-panel USB
* 1x rear-panel full-size HDMI connector
* 1x front-panel bi-color user LED
* 1x front-panel user pushbutton
* 1x rear-panel barrel jack for power
* 1x Application connector with:
* 2x TTL level UARTs
* 10x TTL level Digital IO
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42148
The GW16083 Ethernet Expansion Mezzanine adds the following to supported
Gateworks baseboards:
* 7-port Ethernet Switch
* 4x RJ45 ports (ENET1-4) supporing 802.11af/at PoE (with optional PoE module)
* 2x RJ45 ports or SFP module (ENET5-6) (auto-selected)
This series adds support for a phy driver that adds support for ENET5/ENET6
PHY adding initialization for those PHY's and a polling mechanism that detects
SFP insertion and configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42147
The GW16082 miniPCI Expansion Mezzanine has the INTA/B/C/D IRQ's reversed
from the PCI standard. This will soon be resolved in the bootloader via
devicetree, but in the meantime this will work around the issue.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42146
Now that we migrated all users to dtb based detection, we can drop the
board fixup code.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42129
This requires individual images for each board version for now.
Linux partition was shrunk to ensure writing thewrong image won't
erase wifi calibration data.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42126
Add the required nodes to the dtsi files and code to prevent double
registration from the board support code.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42123
In preparation for switching to dtb based board identification, add
support for building lzma-loader and lzma cfe kernels with dtb
appended.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42121
Allow appending a dtb blob to the binary and use it for identifying the
board. Fall back to nvram based identification in case of no dtb passed.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42119
This adds some code based on code from the Broadcom GPL tar to fix the
reboot problems on BCM4705/BCM4785. I tried rebooting my device for ~10
times and have never seen a problem. This reverts the changes in the
previous commit and adds the real fix as suggested by Rafał.
Setting bit 22 in Reg 22, sel 4 puts the BIU (Bus Interface Unit) into
async mode.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 42088
This adds some code based on code from the Broadcom GPL tar to fix the
reboot problems on BCM4705/BCM4785. I tried rebooting my device for ~10
times and have never seen a problem. This reverts the changes in the
previous commit and adds the real fix as suggested by Rafał.
Setting bit 22 in Reg 22, sel 4 puts the BIU (Bus Interface Unit) into
async mode.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 42083
In r41578 this was added in order to make default images bootable for the BB
release. We need more generic approach for this.
Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 42071
