atheros: ar2315-pci: rework the configuration access code
Use __raw_{read,write}l accessors and use Abort interrupt to detect a
configuration space read/write errors. The second change improves errors
detection, what improves the device presence detection and helps us to
avoid following (and similar) errors:
pci 0000:00:00.2: ignoring class 0x7e0200 (doesn't match header type 02)
pci 0000:00:00.2: bridge configuration invalid ([bus 03-90]), reconfiguring
pci 0000:00:00.2: not setting up bridge for bus 0000:01
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42502
This commit is contained in:
John Crispin
parent
dbdd8906ac
commit
78c914ffe5
1 changed files with 48 additions and 34 deletions
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@ -7,7 +7,7 @@
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+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
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--- /dev/null
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+++ b/arch/mips/ar231x/pci.c
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@@ -0,0 +1,336 @@
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@@ -0,0 +1,350 @@
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+/*
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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@ -65,55 +65,64 @@
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+#define AR2315_MEM_SIZE 0x00ffffffUL
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+#define AR2315_IO_SIZE 0x00007fffUL
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+
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+/* Arbitrary size of memory region to access the configuration space */
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+#define AR2315_PCI_CFG_SIZE 0x00100000
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+
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+#define AR2315_PCI_HOST_SLOT 3
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+#define AR2315_PCI_HOST_DEVID ((0xff18 << 16) | PCI_VENDOR_ID_ATHEROS)
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+
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+static unsigned long configspace;
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+static void __iomem *ar2315_pci_cfg_mem;
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+
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+static int ar2315_pci_cfg_access(int devfn, int where, int size, u32 *ptr,
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+ bool write)
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+{
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+ int func = PCI_FUNC(devfn);
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+ int dev = PCI_SLOT(devfn);
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+ u32 value = 0;
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+ int err = 0;
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+ u32 addr;
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+ u32 addr = (1 << (13 + dev)) | (func << 8) | (where & ~3);
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+ u32 mask = 0xffffffff >> 8 * (4 - size);
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+ u32 sh = (where & 3) * 8;
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+ u32 value, isr;
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+
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+ /* Prevent access past the remapped area */
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+ if (addr >= AR2315_PCI_CFG_SIZE || dev > 18)
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+ return PCIBIOS_DEVICE_NOT_FOUND;
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+
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+ /* Clear pending errors */
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+ ar231x_write_reg(AR2315_PCI_ISR, AR2315_PCI_INT_ABORT);
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+ /* Select Configuration access */
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+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
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+ mb();
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+
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+ addr = (u32)configspace + (1 << (13 + dev)) + (func << 8) + where;
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+ if (size == 1)
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+ addr ^= 0x3;
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+ else if (size == 2)
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+ addr ^= 0x2;
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+ mb(); /* PCI must see space change before we begin */
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+
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+ value = __raw_readl(ar2315_pci_cfg_mem + addr);
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+
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+ isr = ar231x_read_reg(AR2315_PCI_ISR);
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+ if (isr & AR2315_PCI_INT_ABORT)
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+ goto exit_err;
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+
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+ if (write) {
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+ value = *ptr;
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+ if (size == 1)
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+ err = put_dbe(value, (u8 *)addr);
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+ else if (size == 2)
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+ err = put_dbe(value, (u16 *)addr);
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+ else if (size == 4)
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+ err = put_dbe(value, (u32 *)addr);
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+ value = (value & ~(mask << sh)) | *ptr << sh;
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+ __raw_writel(value, ar2315_pci_cfg_mem + addr);
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+ isr = ar231x_read_reg(AR2315_PCI_ISR);
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+ if (isr & AR2315_PCI_INT_ABORT)
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+ goto exit_err;
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+ } else {
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+ if (size == 1)
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+ err = get_dbe(value, (u8 *)addr);
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+ else if (size == 2)
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+ err = get_dbe(value, (u16 *)addr);
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+ else if (size == 4)
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+ err = get_dbe(value, (u32 *)addr);
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+ if (err)
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+ *ptr = 0xffffffff;
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+ else
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+ *ptr = value;
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+ *ptr = (value >> sh) & mask;
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+ }
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+
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+ goto exit;
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+
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+exit_err:
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+ ar231x_write_reg(AR2315_PCI_ISR, AR2315_PCI_INT_ABORT);
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+ if (!write)
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+ *ptr = 0xffffffff;
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+
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+exit:
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+ /* Select Memory access */
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+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
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+
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+ return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
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+ return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND :
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+ PCIBIOS_SUCCESSFUL;
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+}
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+
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+static inline int ar2315_pci_local_cfg_rd(unsigned devfn, int where, u32 *val)
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@ -129,7 +138,7 @@
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+static int ar2315_pci_cfg_read(struct pci_bus *bus, unsigned int devfn,
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+ int where, int size, u32 *value)
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+{
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+ if ((PCI_SLOT(devfn) != 0) || (PCI_FUNC(devfn) > 2))
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+ if (PCI_SLOT(devfn) == AR2315_PCI_HOST_SLOT)
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+ return PCIBIOS_DEVICE_NOT_FOUND;
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+
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+ return ar2315_pci_cfg_access(devfn, where, size, value, 0);
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@ -138,7 +147,7 @@
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+static int ar2315_pci_cfg_write(struct pci_bus *bus, unsigned int devfn,
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+ int where, int size, u32 value)
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+{
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+ if ((PCI_SLOT(devfn) != 0) || (PCI_FUNC(devfn) > 2))
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+ if (PCI_SLOT(devfn) == AR2315_PCI_HOST_SLOT)
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+ return PCIBIOS_DEVICE_NOT_FOUND;
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+
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+ return ar2315_pci_cfg_access(devfn, where, size, &value, 1);
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@ -282,8 +291,13 @@
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+ return -ENODEV;
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+
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+ /* Remap PCI config space */
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+ configspace = (unsigned long)ioremap_nocache(AR2315_PCIEXT,
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+ 1 * 1024 * 1024);
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+ ar2315_pci_cfg_mem = ioremap_nocache(AR2315_PCIEXT,
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+ AR2315_PCI_CFG_SIZE);
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+ if (!ar2315_pci_cfg_mem) {
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+ pr_err("ar2315-pci: failed to remap PCI config space\n");
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+ return -ENOMEM;
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+ }
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+
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+ ar2315_pci_controller.io_map_base =
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+ (unsigned long)ioremap_nocache(AR2315_MEM_BASE +
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+ AR2315_MEM_SIZE, AR2315_IO_SIZE);
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@ -339,7 +353,7 @@
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+ return 0;
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+
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+error:
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+ iounmap((void __iomem *)configspace);
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+ iounmap(ar2315_pci_cfg_mem);
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+ return res;
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+}
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+
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