bcm53xx: add bcm53xxspiflash driver for SPI flashes
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 42260
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b118879cc3
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3 changed files with 306 additions and 0 deletions
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@ -167,6 +167,7 @@ CONFIG_MIGHT_HAVE_PCI=y
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_MTD_BCM47XX_PARTS=y
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# CONFIG_MTD_PHYSMAP_OF is not set
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CONFIG_MTD_SPI_BCM53XXSPIFLASH=y
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CONFIG_MTD_SPI_NOR=y
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# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
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CONFIG_MULTI_IRQ_HANDLER=y
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@ -0,0 +1,263 @@
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--- a/drivers/mtd/spi-nor/Kconfig
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+++ b/drivers/mtd/spi-nor/Kconfig
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@@ -28,4 +28,10 @@ config SPI_FSL_QUADSPI
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This enables support for the Quad SPI controller in master mode.
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We only connect the NOR to this controller now.
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+config MTD_SPI_BCM53XXSPIFLASH
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+ tristate "SPI-NOR flashes connected to the Broadcom ARM SoC"
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+ depends on MTD_SPI_NOR
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+ help
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+ SPI driver for flashes used on Broadcom ARM SoCs.
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+
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endif # MTD_SPI_NOR
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--- a/drivers/mtd/spi-nor/Makefile
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+++ b/drivers/mtd/spi-nor/Makefile
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@@ -1,2 +1,3 @@
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obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
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obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o
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+obj-$(CONFIG_MTD_SPI_BCM53XXSPIFLASH) += bcm53xxspiflash.o
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--- /dev/null
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+++ b/drivers/mtd/spi-nor/bcm53xxspiflash.c
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@@ -0,0 +1,241 @@
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+#include <linux/module.h>
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+#include <linux/delay.h>
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+#include <linux/spi/spi.h>
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+#include <linux/mtd/spi-nor.h>
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/cfi.h>
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+
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+static const char * const probes[] = { "bcm47xxpart", NULL };
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+
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+struct bcm53xxsf {
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+ struct spi_device *spi;
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+ struct mtd_info mtd;
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+ struct spi_nor nor;
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+};
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+
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+/**************************************************
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+ * spi-nor API
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+ **************************************************/
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+
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+static int bcm53xxspiflash_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
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+ int len)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+
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+ return spi_write_then_read(b53sf->spi, &opcode, 1, buf, len);
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+}
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+
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+static int bcm53xxspiflash_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
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+ int len, int write_enable)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+ u8 *cmd = kzalloc(len + 1, GFP_KERNEL);
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+ int err;
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+
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+ if (!cmd)
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+ return -ENOMEM;
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+
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+ cmd[0] = opcode;
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+ memcpy(&cmd[1], buf, len);
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+ err = spi_write(b53sf->spi, cmd, len + 1);
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+
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+ kfree(cmd);
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+
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+ return err;
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+}
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+
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+static int bcm53xxspiflash_read(struct spi_nor *nor, loff_t from, size_t len,
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+ size_t *retlen, u_char *buf)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+ struct spi_message m;
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+ struct spi_transfer t[2] = { { 0 }, { 0 } };
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+ unsigned char cmd[5];
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+ int cmd_len = 0;
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+ int err;
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+
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+ spi_message_init(&m);
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+
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+ cmd[cmd_len++] = SPINOR_OP_READ;
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+ if (b53sf->mtd.size > 0x1000000)
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+ cmd[cmd_len++] = (from & 0xFF000000) >> 24;
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+ cmd[cmd_len++] = (from & 0x00FF0000) >> 16;
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+ cmd[cmd_len++] = (from & 0x0000FF00) >> 8;
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+ cmd[cmd_len++] = (from & 0x000000FF) >> 0;
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+
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+ t[0].tx_buf = cmd;
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+ t[0].len = cmd_len;
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+ spi_message_add_tail(&t[0], &m);
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+
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+ t[1].rx_buf = buf;
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+ t[1].len = len;
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+ spi_message_add_tail(&t[1], &m);
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+
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+ err = spi_sync(b53sf->spi, &m);
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+ if (err)
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+ return err;
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+
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+ if (retlen && m.actual_length > cmd_len)
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+ *retlen = m.actual_length - cmd_len;
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+
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+ return 0;
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+}
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+
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+static void bcm53xxspiflash_write(struct spi_nor *nor, loff_t to, size_t len,
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+ size_t *retlen, const u_char *buf)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+ struct spi_message m;
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+ struct spi_transfer t = { 0 };
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+ u8 *cmd = kzalloc(len + 5, GFP_KERNEL);
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+ int cmd_len = 0;
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+ int err;
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+
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+ if (!cmd)
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+ return;
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+
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+ spi_message_init(&m);
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+
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+ cmd[cmd_len++] = nor->program_opcode;
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+ if (b53sf->mtd.size > 0x1000000)
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+ cmd[cmd_len++] = (to & 0xFF000000) >> 24;
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+ cmd[cmd_len++] = (to & 0x00FF0000) >> 16;
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+ cmd[cmd_len++] = (to & 0x0000FF00) >> 8;
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+ cmd[cmd_len++] = (to & 0x000000FF) >> 0;
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+ memcpy(&cmd[cmd_len], buf, len);
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+
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+ t.tx_buf = cmd;
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+ t.len = cmd_len + len;
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+ spi_message_add_tail(&t, &m);
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+
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+ err = spi_sync(b53sf->spi, &m);
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+ if (err)
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+ goto out;
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+
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+ if (retlen && m.actual_length > cmd_len)
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+ *retlen += m.actual_length - cmd_len;
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+
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+out:
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+ kfree(cmd);
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+}
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+
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+static int bcm53xxspiflash_erase(struct spi_nor *nor, loff_t offs)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+ unsigned char cmd[5];
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+ int i;
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+
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+ i = 0;
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+ cmd[i++] = nor->erase_opcode;
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+ if (b53sf->mtd.size > 0x1000000)
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+ cmd[i++] = (offs & 0xFF000000) >> 24;
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+ cmd[i++] = ((offs & 0x00FF0000) >> 16);
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+ cmd[i++] = ((offs & 0x0000FF00) >> 8);
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+ cmd[i++] = ((offs & 0x000000FF) >> 0);
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+
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+ return spi_write(b53sf->spi, cmd, i);
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+}
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+
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+static const struct spi_device_id *bcm53xxspiflash_read_id(struct spi_nor *nor)
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+{
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+ struct bcm53xxsf *b53sf = nor->priv;
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+ struct device *dev = &b53sf->spi->dev;
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+ const struct spi_device_id *id;
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+ unsigned char cmd[4];
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+ unsigned char resp[2];
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+ char *name = NULL;
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+ int err;
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+
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+ /* SST and Winbond/NexFlash specific command */
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+ cmd[0] = 0x90; /* Read Manufacturer / Device ID */
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+ cmd[1] = 0;
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+ cmd[2] = 0;
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+ cmd[3] = 0;
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+ err = spi_write_then_read(b53sf->spi, cmd, 4, resp, 2);
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+ if (err < 0) {
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+ dev_err(dev, "error reading SPI flash id\n");
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+ return ERR_PTR(-EBUSY);
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+ }
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+ switch (resp[0]) {
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+ case 0xef: /* Winbond/NexFlash */
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+ switch (resp[1]) {
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+ case 0x17:
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+ name = "w25q128";
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+ break;
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+ }
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+ if (!name) {
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+ dev_err(dev, "Unknown Winbond/NexFlash flash: %02X %02X\n",
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+ resp[0], resp[1]);
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+ return ERR_PTR(-ENOTSUPP);
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+ }
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+ goto found_name;
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+ }
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+
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+ /* TODO: Try more ID commands */
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+
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+ return ERR_PTR(-ENODEV);
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+
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+found_name:
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+ id = spi_nor_match_id(name);
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+ if (!id) {
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+ dev_err(dev, "No matching entry for %s flash\n", name);
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+ return ERR_PTR(-ENOENT);
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+ }
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+
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+ return id;
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+}
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+
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+/**************************************************
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+ * SPI driver
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+ **************************************************/
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+
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+static int bcm53xxspiflash_probe(struct spi_device *spi)
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+{
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+ struct bcm53xxsf *b53sf;
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+ int err;
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+
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+ b53sf = devm_kzalloc(&spi->dev, sizeof(*b53sf), GFP_KERNEL);
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+ if (!b53sf)
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+ return -ENOMEM;
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+ spi_set_drvdata(spi, b53sf);
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+
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+ b53sf->spi = spi;
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+
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+ b53sf->mtd.priv = &b53sf->nor;
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+
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+ b53sf->nor.mtd = &b53sf->mtd;
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+ b53sf->nor.dev = &spi->dev;
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+ b53sf->nor.read_reg = bcm53xxspiflash_read_reg;
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+ b53sf->nor.write_reg = bcm53xxspiflash_write_reg;
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+ b53sf->nor.read = bcm53xxspiflash_read;
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+ b53sf->nor.write = bcm53xxspiflash_write;
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+ b53sf->nor.erase = bcm53xxspiflash_erase;
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+ b53sf->nor.read_id = bcm53xxspiflash_read_id;
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+ b53sf->nor.priv = b53sf;
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+
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+ err = spi_nor_scan(&b53sf->nor, NULL, SPI_NOR_NORMAL);
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+ if (err)
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+ return err;
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+
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+ err = mtd_device_parse_register(&b53sf->mtd, probes, NULL, NULL, 0);
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+ if (err)
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+ return err;
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+
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+ return 0;
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+}
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+
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+static int bcm53xxspiflash_remove(struct spi_device *spi)
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+{
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+ return 0;
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+}
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+
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+static struct spi_driver bcm53xxspiflash_driver = {
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+ .driver = {
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+ .name = "bcm53xxspiflash",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = bcm53xxspiflash_probe,
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+ .remove = bcm53xxspiflash_remove,
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+};
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+
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+module_spi_driver(bcm53xxspiflash_driver);
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@ -0,0 +1,42 @@
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--- a/drivers/mtd/spi-nor/bcm53xxspiflash.c
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+++ b/drivers/mtd/spi-nor/bcm53xxspiflash.c
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@@ -173,7 +173,8 @@ static const struct spi_device_id *bcm53
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/* TODO: Try more ID commands */
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- return ERR_PTR(-ENODEV);
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+ /* Some chips used by Broadcom may actually support JEDEC */
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+ return spi_nor_read_id(nor);
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found_name:
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id = spi_nor_match_id(name);
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -629,7 +629,7 @@ const struct spi_device_id spi_nor_ids[]
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};
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EXPORT_SYMBOL_GPL(spi_nor_ids);
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-static const struct spi_device_id *spi_nor_read_id(struct spi_nor *nor)
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+const struct spi_device_id *spi_nor_read_id(struct spi_nor *nor)
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{
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int tmp;
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u8 id[5];
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@@ -660,6 +660,7 @@ static const struct spi_device_id *spi_n
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dev_err(nor->dev, "unrecognized JEDEC id %06x\n", jedec);
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return ERR_PTR(-ENODEV);
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}
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+EXPORT_SYMBOL_GPL(spi_nor_read_id);
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static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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--- a/include/linux/mtd/spi-nor.h
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+++ b/include/linux/mtd/spi-nor.h
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@@ -188,6 +188,8 @@ struct spi_nor {
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void *priv;
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};
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+const struct spi_device_id *spi_nor_read_id(struct spi_nor *nor);
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+
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/**
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* spi_nor_scan() - scan the SPI NOR
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* @nor: the spi_nor structure
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