This ports 9e2a7b779e6f0914395da3657b00f0ac00209bfd to the 4.1 patches.
I forgot this when preparing the initial 4.1 patch.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46453
Basically the only error I am seeing is "Correctable Error". Also newer
lantiq PCIe drivers have this message wrapped in a "if debug enabled"
block. So it should be safe to disable this warning.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46222
Newer DSL driver versions depend on the address information.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46221
Make it consistent with the net_device struct and the xrx200 driver
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46219
All (still relevant) patches were refresh.
The following patches were dropped because they are applied upstream:
- 0003-MIPS-lantiq-handle-vmmc-memory-reservation.patch
- 0005-MIPS-lantiq-add-reset-controller-api-support.patch
- 0006-MIPS-lantiq-reboot-gphy-on-restart.patch
- 0009-MIPS-lantiq-command-line-work-around.patch
- 0010-MIPS-lantiq-export-soc-type.patch
- 0011-lantiq-add-support-for-xrx200-firmware-depending-on-.patch
- 0037-MIPS-lantiq-move-eiu-init-after-irq_domain-register.patch
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46216
This also adds the old hardcoded value to the VGV7519BRN profile to make
sure that images are still generated correctly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 45882
In r44391 the kernel partion size was increased to allow larger kernels,
but the rootfs partition offset was missed. Fix this by setting the
rootfs offset to the expected value.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45868
There are already ifx_pcie_bios_{map_irq,plat_dev_init} hooks defined in
ifxmips_pcie.c. Instead of defining a new hook we simply re-use the
existing ones (this is basically what the lantiq BSP code does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 45718
The PCIe bus seems to require a hack/workaround when PCI is enabled as
well. Unfortunately this is guarded by an CONFIG_IFX_PCI ifdef, which is
only defined in lantiq's BSP code. The config symbol for the upstream
lantiq PCI driver is CONFIG_PCI_LANTIQ.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 45717
Here the device tree entry for ifxhcd is listed as compatible with one
supported in dwc2 (after patching the dwc driver appropriately).
A second entry is added to support the second core of the hcd. This
entry is listed to be compatible with only dwc2. Done this way there
should be backwards support for both hcd drivers (ltq-hcd and dwc2)
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44676
This patch switches calls to readl/writel to their
dwc2_readl/dwc2_writel equivalents which preserve platform endianness.
This patch is necessary to access dwc2 registers correctly on big
endian systems such as the mips based SoCs made by Lantiq. Then dwc2
can be used to replace ifx-hcd driver for Lantiq platforms found e.g.
in OpenWrt.
The patch was autogenerated with the following commands:
$EDITOR core.h
sed -i "s/\<readl\>/dwc2_readl/g" *.c hcd.h hw.h
sed -i "s/\<writel\>/dwc2_writel/g" *.c hcd.h hw.h
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44675
Lantiq driver does not work with autodetected fifo sizes so use ones
from original ltq-hcd driver in dwc2. Other values can be
autodetected.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44674
Port gpio code from original ltq-hcd driver to dwc2.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44673
Add VR9 specific usb initialization bits from ltq-hcd to platform
initialization.
This patch is more of a proof-of-concept than production quality
since the initialization registers are different on other lantiq
platforms.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44672
Disable ARCH_NEEDS_CPU_IDLE_COUPLED by-default in generic config, since
only one platfrom (omap) needs them.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 44614
CONFIG_MTD_SPLIT_SUPPORT symbol default value is 'y' and many platform
specific configs explicitly enables it, while no one platform disables
this symbol. So place it in generic config and remove from platform
specific configs.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 44612
CONFIG_GENERIC_NET_UTILS is selected by CONFIG_NET and already enabled
in generic config, so we don't need this symbol in platform specific
configurations.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 44611
Most MIPS targets have it disabled, so move the symbol to the generic
configs to keep target configs small.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44583
Some Lantiq SoCs are not able to use buffered writes properly with
Intel command set flash due to the way NOR addresses on EBU are
manipulated. This patch disables buffered writes on those devices.
The only device affected at the moment is ARV4510PW, others use
AMD/Fujitsu command set.
Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
SVN-Revision: 44451
For targets with NO_XIP ltq_mtd->map[i].phys equals -1 and devm_ioremap fails.
Fix this by using pdev->resource[i].start instead.
Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
SVN-Revision: 44450
This adds a patch to target/linux/lantiq/patches-3.14
fixing a bug clock code on ar9. The current version returns
the wrong value for the fpi clock frequency in some
cases.
See discussion for further details:
https://lists.openwrt.org/pipermail/openwrt-devel/2015-January/030688.html
I'm not sure about the patch naming and numbering convention.
Do please let me know it this is not OK.
Many thanks,
Ben Mulvihill
Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
SVN-Revision: 44083
