TP-Link Archer C59v2 is a dual-band AC1350 router based on
Qualcomm/Atheros QCA9561+QCA9886 chips.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- UART header on PCB
Flash instruction:
- via web UI:
1. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
2. Login to router and open the Advanced tab
3. Navigate to System Tools -> Firmware Upgrade
4. Upload firmware using the Manual Upgrade form
- via TFTP:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Keith Maika <keithm@aoeex.com>
This fixes:
drivers/mtd/redboot.c:299:34: error: array type has incomplete element type 'struct of_device_id'
Fixes: 5e8b4be531 ("kernel: add DT binding support to the mtd redboot parser")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
linux,part-probe should be avoided as its only supported with OpenWrt
downstream patch that is going to be dropped eventually.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
On brcm47xx boards, the model ID is the combination of the "boardtype" nvram
variable and an optional supplemental "boardnum" variable while the human
readable model name is usually exposed in the "machine" field of the
/proc/cpuinfo file.
Move the extraction of the board nvram variables and model name string into
the 01_sysinfo file and rework the 01_detect board configuration script to
solely use the prepared sysinfo values without performing own detection
logic.
As a consequence, we can drop the ucidef_set_board_id() and
ucidef_set_model_name() invocations in favor to the generic behaviour
which copies the /tmp/sysinfo/{board_name,model} values into the board.json
"id" and "name" fields respectively.
Since "01_detect" only contains network configuration logic after this
change, move it to "01_network" and rename the contained "detect_by_xxx"
functions to "configure_by_xxx" instead, to avoid potential confusion.
Fixes FS#1576
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
fixes FS#1034, squash fs images fails to boot because of missing ARM BCJ filter decoder
also activate squashf image creation
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
The Traverse LS1043-S board is a router board based on
NXP/Freescale's LS1043 SoC, with 4x1GBase-T, 1 SFP and 1 SFP+,
as well as miniPCIe and M.2 LTE.
Unlike the Layerscape reference boards, the LS1043-S board has
NAND flash and uses the mainline U-Boot.
This patch implements support for the LS1043-S board, as well as
the earlier LS1043-V board. It is our intention that all boards
in this family (LS1043-S and later, Five64) will boot the same binary.
Not included in this patchset are the hwmon drivers not in the kernel
(emc1704,pac1934) or the bootloader.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
This is required for the Traverse LS1043 family, we generate a FIT image
that works on all boards across the family. This is done by creating
multiple configurations that select the right DTB for the board.
The bootloader on these boards is configured to boot like this:
bootm $kernel_load#ls1043s
bootm $kernel_load#ls1043v
This is based on earlier work by Jason Wu for Zynq:
https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040460.html
Modified to add FDT load addresses and multiple configurations with DTB.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
This is required on the Traverse LS1043 boards to support SFP
and xDSL plug-ins.
This will not be needed on kernel 4.14.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
In boards with fdt is impossible to use kmod-w1-gpio-custom.
w1-gpio-custom create platform structure for w1-gpio module,
but if board use fdt, data is ignored in w1-gpio probe.
This workaround fix the problem.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
The device name is corrected to match the hardware-stored (in hard config
flash space) device name.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
The device name is corrected to match the hardware-stored (in hard config
flash space) device name.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested on HC5661A and it now fixes the issue that when enabling sd card
in HC5661A, the wan and 3 lan ports will down.
Known issue:
- When enabling SD card support, the led light of system will down and the rest 2 lights keep working.
Signed-off-by: LoveSy <shana@zju.edu.cn>
There is another thing about crc to do when initialize SD card on
MT7628.
This commit is to fix this init issue.
Signed-off-by: LoveSy <shana@zju.edu.cn>
Qxwlan E750G v8 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (PoE support)
- 2x 10/100/1000 Mbps Ethernet
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E750A v4 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 5G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (USB 2.0 bus only)
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9558)
- 3x 10/100/1000 Mbps Ethernet (one port with PoE support)
- 4x miniPCIe slot (USB 2.0 bus only)
- 1x microSIM slot
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x 3-pos switch
- 1x DC jack for main power input (9-48 V)
- UART (JP5) and LEDs (J8) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
The driver is written in such a way that with a board defintion that
connects a fixed phy, mdio, and switch in a certain way, a kernel oops could
result because of lack of previously probed mdio bus.
This commit allows for easier debugging in this case by casting the
correct blame with serial console messages.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
It's a little noisier but makes it obvious when the ar7240 switch was
connected to the MDIO bus, and to which phy device (or the failure
to do so).
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
NB: Error only appears with ag71xx debug messages and dynamic printk
enabled. This is probably why no one has caught it before.
Previously phy probe debug messages used old (now wrong) functions
to get the phy name for printing. There was also the chance of
a NULL pointer in the event no phy_device was found.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?)
Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0
For ar7240 and older chips, manually create platform device after
ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between
ag71xx_hw_init() and ag71xx_phy_connect().
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Remove mdio1 and phy1 handle. AR8327N is controlled through mdio0.
Add gmac-config for Archer C7.
Remove ucidef_set_interfaces_lan_wan. They can be determined by config_generate automatically.
The following are for adding support for WDR4900 v2/Archer C7 v1 and other
devices that shared the same machine file in ar71xx:
Move mtd partitions to archer-c7-v2.dts. Only Archer C7 v2 has 16M flash.
Flash on Archer C7 v1/TL-WDR4900 v2 is 8M.
Add label for wlan leds. The default trigger for archer c7/wdr4900 is different.
Move wlan5g led to archer-c7-v2.dts. 5G led on WDR4900 is connected to ar9380.
Move rfkill definition to archer-c7-v2.dts. There is no such a button on wdr4900 v2.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
enable mdio1 by default because mdio1 node is a subnode of eth1
and eth1 node is a "simple-mfd", which makes mdio1 disabled when
eth1 isn't enabled.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Most qca devices use 115200n8 as it's default uart baudrate.
Add 'chosen' node for qca953x like other SoCs in ath79 target.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Commit c7efc93 renamed controller name
to qca,ar9340-intc and added some functions but qca9533.dtsi was overlooked.
Correct the dtsi and adust it to the new format
Add gmac and correct reset for cascaded irq and build-in switch
Also add the reference clock to soc dtsi so we don't have to have it in every dts
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
Remove switch reset definition
Fix gmac compatible string (We only need SW_PHY_SWAP and SW_PHY_ADDR_SWAP on qca953x so use ar9330-gmac instead of ar9340-gmac.)
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
gmac0 is always connected to switch phy4 and mdio1 is always needed.
So add phy handle for eth0 and enable mdio1 by default.
Move fixed-link for gmac1 from device dts to ar9331.dtsi because gmac1 is always connected to builtin switch.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Enable mdio1 by default because mdio1 is needed when eth1 is enabled.
PS: If a ar9341 device has only one port and you only want to use gmac0,
change compatible of gmac1 to "syscon", "simple-mfd" in dts.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This patch did several things:
1. Probe the builtin switch as a separated mdio device.
2. Register a separated mdio bus for builtin switch.
3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
We need to have mdio1 belonging to gmac1 initialized before gmac0.
Split it into a separated mdio device to get both mdios ready before probing gmac.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The builtin switch has it's initial valid mac address(00:00:01:00:00:00).
Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device.
Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Only build images for straight OpenWrt (using all flash; wipes out
partitions that contain information only important for accessing a
now defunct cloud service with the stock firmware) since the stock
firmware is now irrelevant.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The wrong MAC addresses (from the point of view of the physical device
label) were being assigned to the wrong interfaces. Fix that.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
