Even the commit message of the patch adding support for the MiWiFi Nano
says that a 16 MB flash chip is used. Extend the firmware partition to
make use of all available flash space.
Fixes: FS#622
Signed-off-by: Mathias Kresin <dev@kresin.me>
Netgear X4 R7500 comes with a QCA988X. Select a firmware that matches
the ath10k chipset
Signed-off-by: Thomas Reifferscheid <thomas@reifferscheid.org>
Commit 23dac14d058f ("MIPS: PCI: Use struct list_head lists") changed
the controller list from reverse to straight order. Use the last entry
in the controller list to get the fist conroller of the system.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Upstream commit 23dac14d058f ("MIPS: PCI: Use struct list_head lists")
changed the controller list from reverse to straight order without
taking care of the changed order for the scan of the recorded PCI
controllers.
Traverse the list in reverse order to restore the former behaviour.
This patches fixes the following PCI error on lantiq:
pci 0000:01:00.0: BAR 0: error updating (0x1c000004 != 0x000000)
Signed-off-by: Mathias Kresin <dev@kresin.me>
Right now all brcm2708 patches are extracted from the non-mainline
raspberrypi/linux git tree. Many of them are hacks and/or are unneeded
in LEDE. Raspberry Pi is getting better and better mainline support so
it would be nice to finally start maintaining patches in a cleaner way:
1) Backport patches accepted in upstream tree
2) Start using upstream drivers
3) Pick only these patches that are needed for more complete support
Handling above tasks requires grouping patches - ideally using the same
prefixes as generic ones. It means we should rename existing patches to
use some high prefix. This will allow e.g. use 0xx for backported code.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Stijn Tintel <stijn@linux-ipv6.be>
P&W (full name: Shenzhen Progress&Win Technologies) R602N (could be also
labeled as R602F, R602, etc.) is a simple N300 router with 5-port
10/100 Mbps switch, non-detachable antennas and USB.
CPE505 is an outdoor CPE with PoE support and detachable antennas.
Both devices are based on Qualcomm/Atheros QCA9531 v2.
Common specification:
- 650/597/216 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 16 MB of FLASH
- UART (J2) header on PCB
R602N specification:
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 2T2R 2.4 GHz with external LNA and PA (SE2576L), up to 28 dBm
- 2x external, non-detachable antennas
- 7x LED, 1x button
CPE505N specification:
- 2x 10/100 Mbps Ethernet (both ports support passive PoE 12-24 V)
- 2T2R 2.4 GHz with external LNA and PA (SKY65174-21), up to 30 dBm
- 2x external, detachable antennas (RP-SMA connectors)
- 1x RGB LED, 2x LEDs (in RJ45 sockets), 1x button
Flash instructions:
It seems that there are many different versions of the firmware which
these devices are shipped with. The generic/standard one is based on
some modified OpenWrt and LEDE firmware can be flashed directly from
vendor's webgui or with sysupgrade (root password is "admin123").
Before flashing, make sure (use "fw_printenv") that the kernel load
address in your device is set to "0x9f050000" (bootcmd variable is
"bootm 0x9f050000"). If your device uses different load address, you
should first change it, under vendor's firmware, with command:
fw_setenv bootcmd "bootm 0x9f050000 || bootm OLD_ADDRESS"
Where OLD_ADDRESS is previous kernel load address (in CPE505 version
I got access to, it was "0x9fe80000"). This will allow you to use
both the vendor's and LEDE firmware.
If version of your device contains empty U-Boot environment (you will
get information about this after issuing "fw_printenv"), you should
use U-Boot, serial line access and TFTP to perform firmware upgrade:
1. tftp 0x80060000 lede-ar71xx-generic-...-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000 || bootm OLD_ADDRESS"
5. saveenv && reset
These devices contain also web recovery mode inside U-Boot. It can be
started with pressing the reset button for around 3 seconds just after
the device powerup. Web recovery panel is available on "192.168.10.9"
and to be able to use it, IP on your PC must be set to "192.168.10.10".
Make sure to change kernel load address before using recovery mode or
the U-Boot will not be able to load LEDE firmware.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This patch adds initial support for the MikroTik RouterBOARD hAP ac
(RB962UiGS-5HacT2HnT).
All functions are supported except:
-SFP cage (eth1) is not working
-WLAN LEDs are not working
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
This patch adds support for the MikroTik RouterBOARD hAP ac lite
(RB952Ui-5ac2nD).
The hAP ac lite is nearly identical to the hAP, with an added QCA9887
5GHz radio. The 2.4GHz radio ID is also changed in the hAP ac lite.
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
v4.9 CM code has a few bugs on this HW. Disable the GCR register access
during boot. This caused a cpu stall.
Signed-off-by: John Crispin <john@phrozen.org>
The Pistachio target is a MIPS interaptiv based SoC developed by
Imagination Technologies. It includes blocks for i2c, spi, audio,
usb and WiFi.
This also adds the base support for the 'Creator Ci40 (marduk)'
device which uses the Pistachio SoC to create an IoT hub by
including Bluetooth, WiFi and 6lowpan on one board. Additionally 2x
Mikrobus ports are available to expand with further RF technologies
or add sensors. You can find out more here http://creatordev.io.
Note, this commit is just the initial board support hence the
following are not expected to work yet:
* WiFi
* Bluetooth
* 6lowpan
* Audio
* Mikrobus uarts, user leds (clock dependency of 6lowpan chip)
The aim of this commit is to essentially have the same level of
support that currently exists in the mainline kernel.
Signed-off-by: Abhijit Mahajani <Abhijit.Mahajani@imgtec.com>
Signed-off-by: Francois Berder <francois.berder@imgtec.com>
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
Signed-off-by: Mayank Sirotiya <Mayank.Sirotiya@imgtec.com>
Signed-off-by: Sean Kelly <Sean.Kelly@imgtec.com>
This adds kernel support for the Pistachio SoC and the Marduk (Ci40)
board which uses it.
Much of the code for Pistachio has been upstreamed however some
patches are still required to boot from the Marduk board:
* spi bug fixes
* dma bug fixes
* pistachio internal clock tree bug fixes
* spi-nand implementation
* dts based mtd device naming scheme
* dts backports and bug fixes
Signed-off-by: Abhijit Mahajani <Abhijit.Mahajani@imgtec.com>
Signed-off-by: Francois Berder <francois.berder@imgtec.com>
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
This patch adds support for AVM FRITZ!Box 4040.
hardware highlights:
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB Nanya NT5CC128M16IP
FLASH: 32 MiB MXIC MX25L25635FMI
ETH: Qualcomm Atheros QCA8075 Gigabit Switch (4 x LAN, 1 x WAN)
USB: 1 x 3.0 (via Synopsys DesignWare DWC3 controller in the SoC)
1 x 2.0 (via Synopsys DesignWare DWC3 controller in the SoC)
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: one WLAN and one WPS button
LEDS: Power, WAN/Internet, WIFI, INFO (red and amber) and LAN.
Serial:
WARNING: The serial port needs a TTL/RS-232 v3.3 level converter!
The Serial setting is 115200-8-N-1. The SoC's serial port is right
next to the MXIC FLASH chip. The board has a unpopulated 1x4 0.1"
header for it. Use a multimeter to figure out the pinout!
This board currently needs an additional u-boot image in order to boot
properly. Booting with EVA isn't possible ATM.
Install Procedure:
0. It's highly recommended to connect to the serial port.
The serial settings are listed above.
1. install a u-boot image for AVM Fritz!Box 4040
(see <https://github.com/chunkeey/FritzBox-4040-UBOOT/releases> and
<https://github.com/chunkeey/FritzBox-4040-UBOOT/blob/master/upload-to-f4040.sh>)
2. upload the initramfs.itb image via tftp (u-boot listens to
192.168.1.1 - use binary transfer mode!)
3. connect to the FB4040 and use sysupgrade sysupgrade.bin
to install the image.
Works:
- Switch and Ethernet (99%)
- Buttons (WLAN, WPS)
- FLASH (1 x 32MiB NOR Chip)
- WLAN2G and WLAN5G
- CPUFREQ scaling
- PRNG
- serial
- Crypto Accelerator
- sysupgrade (Read the flash instructions to avoid bricking)
- full LEDE Install (Read the flash instructions to avoid bricking)
- LEDs (Power, WAN, Info (red and amber), LAN)
The LEDs are connected to the QCA8075 LED ports.
The AR40xx driver contains a gpio-controller to
handle these special "GPIOs".
- USB Both 3.0 and 2.0 ports
- many packages from other ARMv7 boards
(This does include the RaspberryPi Model 2!)
- ...
Not planned:
- WAN<->LAN short-cut
- Qualcomm Secure Execution Environment
- ...
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John Crispin <john@phrozen.org>
This adds support for describing GPIO chips placed on PCIe cards. Thanks
to this we get working 2.4 GHz LED on Tenda AC9.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This is the standard way we handle this. Please note (it seems) I could
drop few symbols as they are hidden under (disabled) DRM_LEGACY now.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Add back support for the independent_clocks definition that has been
removed between kernel 4.4 and 4.9 by upstream commits
eb96924acddc709db58221c210ca05cd9effb1df and
e86eee6bc2aaa6b3637f6497b26beee09a91bde9
* extend the new cpufreq_dt_platform_data definition in cpufreq-dt.h
* revert the removal of its usage in cpufreq-dt.c
* use new cpufreq-dt.h in qcom-cpufreq.c
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
For IPQ806x targets, TZ protects the registers that are used to
configure the routing of interrupts to a target processor.
To resolve this, this patch uses scm call to route GPIO interrupts
to application processor. Also the scm call interface is changed.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
At the moment as a workaround definition for scm firmware in DT is used as if it is
apq8064 board. This leads to incomplete scm firmware initialization and as a result
cpuidle driver fails to configure.
By design unlike other qcom boards ipq do not use clocks to connect to scm.
Considering this we're removing from DT and scm driver clocks for ipq boards.
As a result cpuidle does not produce errors about failed configuration anymore.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This fixes GIC interrupts (required before switching to 4.9), adds few
new entires & introduces DTS for Archer C5.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This patch adds support for the Zbtlink ZBT-WE2026.
Specification:
- SoC: MediaTek MT7620N (580MHz)
- RAM: 64 MiB
- Flash: 8 MiB SPI
- LAN: 4x100M
- WAN: 1x100M
Installation through bootloader webserver:
- With the power unplugged press and hold reset button.
- Plug power and hold reset button until LED starts to blink.
- Install sysupgrade image using web interface on 192.168.1.1.
Signed-off-by: Vaclav Svoboda <svoboda@neng.cz>
SMP state is generally affected by
- CONFIG_SMP build-time kernel configuration option and
- 'nosmp' runtime kernel commandline option
The SMP state within vpe-mt.c is determined by CONFIG_SMP option.
A runtime check is needed if VPE functionality
should be used with a kernel image that supports SMP.
This fix introduces a check for 'nosmp' command line option
if CONFIG_SMP kernel configuration option is enabled.
Note: This patch is needed to use lantiq FXS if CONFIG_MIPS_MT_SMP
(that activates CONFIG_SMP) is enabled within kernel configuration
and the 'nosmp' command line argument is given to disable SMP at runtime.
Without this patch CONFIG_MIPS_MT_SMP must be disabled before using FXS.
With this patch setting the 'nosmp' parameter is enough.
In general, concurrent usage of FXS and SMP
is incompatible and will cause kernel panics.
Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
It is not needed for anything on the system and skipping this saves some
build time, especially in cases where there is nothing to do.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
The problem is caused by the incorrect handling of the parent inode's
i_nlink count for the dentry to be RENAME_EXCHANGED. There are 3 cases
to consider. Assume we want to RENAME_EXCHANGE struct dentry *a and
struct dentry *b, and inode_a is pointed to by dentry_a, inode_b is
pointed to by dentry_b:
1. If inode_a is a directory, but inode_b isn't, then we must decrease
the i_nlink count of old_dir_i, and increase the i_nlink of new_dir_i.
2. If inode_a isn't a directory, but inode_b is a directory, then we
must increase the i_nlink of old_dir_i, and decrease the i_nlink count
of new_dir_i.
3. If the types of inode_a and inode_b are the same, we don't change the
i_nlink for either old_dir_i or new_dir_i.
Signed-off-by: Jing Qiu <aqiu0720@gmail.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
