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ramips: fix mt7621 boot on v4.9

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v4.9 CM code has a few bugs on this HW. Disable the GCR register access
during boot. This caused a cpu stall.

Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
John Crispin 2017-03-23 09:18:42 +01:00
parent 666bfc6fb5
commit dce3b0057b
1 changed files with 21 additions and 0 deletions
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21
target/linux/ramips/patches-4.9/0098-disable_cm.patch Normal file
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@ -0,0 +1,21 @@
Index: linux-4.9.14/arch/mips/kernel/mips-cm.c
===================================================================
--- linux-4.9.14.orig/arch/mips/kernel/mips-cm.c
+++ linux-4.9.14/arch/mips/kernel/mips-cm.c
@@ -239,6 +239,7 @@ int mips_cm_probe(void)
/* disable CM regions */
write_gcr_reg0_base(CM_GCR_REGn_BASE_BASEADDR_MSK);
+ /*
write_gcr_reg0_mask(CM_GCR_REGn_MASK_ADDRMASK_MSK);
write_gcr_reg1_base(CM_GCR_REGn_BASE_BASEADDR_MSK);
write_gcr_reg1_mask(CM_GCR_REGn_MASK_ADDRMASK_MSK);
@@ -246,7 +247,7 @@ int mips_cm_probe(void)
write_gcr_reg2_mask(CM_GCR_REGn_MASK_ADDRMASK_MSK);
write_gcr_reg3_base(CM_GCR_REGn_BASE_BASEADDR_MSK);
write_gcr_reg3_mask(CM_GCR_REGn_MASK_ADDRMASK_MSK);
-
+*/
/* probe for an L2-only sync region */
mips_cm_probe_l2sync();