Commit graph

12 commits

Author SHA1 Message Date
Felix Fietkau
d8d9282372 lantiq: add a better fix to strip FCS from ethernet packets on XRX200
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 44771
2015-03-15 09:47:34 +00:00
John Crispin
da3fd5dbf9 kenrel: refresh patches
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44678
2015-03-11 17:08:46 +00:00
John Crispin
d5c250b91a lantiq: make the new dwc2 support only work for vr9
danube needs to be added

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44677
2015-03-11 17:08:40 +00:00
John Crispin
72822d0192 lantiq: Use platform endianness when accessing dwc2 registers
This patch switches calls to readl/writel to their
dwc2_readl/dwc2_writel equivalents which preserve platform endianness.

This patch is necessary to access dwc2 registers correctly on big
endian systems such as the mips based SoCs made by Lantiq. Then dwc2
can be used to replace ifx-hcd driver for Lantiq platforms found e.g.
in OpenWrt.

The patch was autogenerated with the following commands:
$EDITOR core.h
sed -i "s/\<readl\>/dwc2_readl/g" *.c hcd.h hw.h
sed -i "s/\<writel\>/dwc2_writel/g" *.c hcd.h hw.h

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>

SVN-Revision: 44675
2015-03-11 17:08:26 +00:00
John Crispin
d77c857509 lantiq: Add sensible hw-defaults for dwc2
Lantiq driver does not work with autodetected fifo sizes so use ones
from original ltq-hcd driver in dwc2. Other values can be
autodetected.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>

SVN-Revision: 44674
2015-03-11 17:08:15 +00:00
John Crispin
2ddcf4c46e lantiq: Configure gpio power output pin when initializing dwc2 usb
Port gpio code from original ltq-hcd driver to dwc2.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>

SVN-Revision: 44673
2015-03-11 17:08:08 +00:00
John Crispin
a23da431dc lantiq: Add usb initialization bits from ltq-hcd to platform init
Add VR9 specific usb initialization bits from ltq-hcd to platform
initialization.

This patch is more of a proof-of-concept than production quality
since the initialization registers are different on other lantiq
platforms.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>

SVN-Revision: 44672
2015-03-11 17:08:02 +00:00
John Crispin
e07c4f2150 lantiq: disable buffered writes on Intel command set flash
Some Lantiq SoCs are not able to use buffered writes properly with
Intel command set flash due to the way NOR addresses on EBU are
manipulated. This patch disables buffered writes on those devices.
The only device affected at the moment is ARV4510PW, others use
AMD/Fujitsu command set.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>

SVN-Revision: 44451
2015-02-14 20:48:32 +00:00
John Crispin
a15dd8ec78 lantiq: Fix flash for targets with NO_XIP
For targets with NO_XIP ltq_mtd->map[i].phys equals -1 and devm_ioremap fails.
Fix this by using pdev->resource[i].start instead.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>

SVN-Revision: 44450
2015-02-14 20:48:26 +00:00
John Crispin
dbfb21ee90 lantiq: make m25p80 work again
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44421
2015-02-12 11:15:56 +00:00
John Crispin
1eb616764e lantiq: fix mac addr assignment inside lantiq_etop
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44420
2015-02-12 09:17:04 +00:00
John Crispin
826b461427 lantiq: add 3.18 support
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44348
2015-02-09 12:13:25 +00:00