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lantiq: disable buffered writes on Intel command set flash

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Some Lantiq SoCs are not able to use buffered writes properly with
Intel command set flash due to the way NOR addresses on EBU are
manipulated. This patch disables buffered writes on those devices.
The only device affected at the moment is ARV4510PW, others use
AMD/Fujitsu command set.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>

SVN-Revision: 44451
This commit is contained in:
John Crispin 2015-02-14 20:48:32 +00:00
parent a15dd8ec78
commit e07c4f2150
2 changed files with 22 additions and 0 deletions
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11
target/linux/lantiq/patches-3.14/0300-MTD-cfi-cmdset-0001-disable-buffered-writes.patch Normal file
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@ -0,0 +1,11 @@
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -40,7 +40,7 @@
/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
// debugging, turns off buffer write mode if set to 1
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
/* Intel chips */
#define I82802AB 0x00ad

11
target/linux/lantiq/patches-3.18/0300-MTD-cfi-cmdset-0001-disable-buffered-writes.patch Normal file
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@ -0,0 +1,11 @@
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -40,7 +40,7 @@
/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
// debugging, turns off buffer write mode if set to 1
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
/* Intel chips */
#define I82802AB 0x00ad