The hardware NAT node has the same reg/unit as the ethernet node. One
of them need to be a child of the other.
Make the hardware NAT node a child of the ethernet node since the it
"reference" the netdev in its properties.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Add the ranges property to the PCI bridges where missing. Add the unit
address to PCI bridge where missing.
Rework the complete rt3883 pci node. Drop the PCI unit nodes from the
dtsi. They are not used by any dts file and should be rather in the dts
than in the SoC dtsi. Express the PCI-PCI bridge in a clean devicetree
syntax. The ralink,pci-slot isn't used by any driver, drop it. Move the
pci interrupt controller out of the pci node. It doesn't share the same
reg and therefore should be an independent/SoC child node.
Move the pci related rt3883 pinctrl setting to the dtsi instead of
defining the very same for each rt3883 board.
If the device_type property is used for PCI units, the unit is treated
as pci bridge which it isn't. Drop it for PCI units.
Reference pci-bridges or the pci node defined in the dtsi instead of
recreating the whole node hierarchy. It allows to change the referenced
node in the dtsi without the need to touch all dts.
Fix the PCI(e) wireless unit addresses. All our PCI(e) wireless chips
are the first device on the bus. The unit address has to be the bus
address instead of the PCI vendor/device id.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Since commit c1e7738988f5 ("checks: add gpio binding properties check")
dtc treats any *-gpios and *-gpio property as phandle at least during
checks. The only whitelisted property is nr-gpio.
Use ralink,nr-gpio in favour of ralink,num-gpios to get rid of false
positive warnings.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The cpu interrupt controller doesn't have a reg property, hence we
can't use a unit address in the node name.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Without this patch you will get an error "gpio-export probe deferral
not supported" when you try to export i2c expander gpio pins.
gpio-export is probed long before i2c-bus and i2c expander are created
and it doesn't retry it so none pins are exported.
Signed-off-by: René van Dorst <opensource@vdorst.com>
apply the change to all instances of the gpio exports patch
Signed-off-by: Mathias Kresin <dev@kresin.me>
Revert 290c54473e ("ath79: fix TP-Link Archer C7 v2 wlan1 MAC address")
which obviously aims to have a distinct MAC address per interface.
Unfortunally it doesn't match what is used by the stock firmware and we
shouldn'z use MAC Adresses not reserverd for/assigned to a particular
board.
The correct MAC adress increments for this board are:
wlan0 (5GHz) : -1
wlan1 (2.4GHz) : 0
eth1 (LAN) : 0
eth0 (WAN) : 1
Fixes: FS#408
Signed-off-by: Mathias Kresin <dev@kresin.me>
It seems to have been missed when the patch was accepted.
Fixes: d591260407 ("brcm63xx: initial support for Sky SR102 router")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
The integrated SoC wifi will likely never be supported, and if,
it will go through DT with the sprom contents there.
Fixes: d591260407 ("brcm63xx: initial support for Sky SR102 router")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Adds Support for the TP-LINK CPE510 V2.0 by TP-Link.
The hardware is almost the same as the CPE510 V1.0
Follow the same processes as for the CPE510 V1.0
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
1) Add comments so it's clear why we did things; this may prevent
someone (e.g. me) from sinking time into fixing things that
aren't broken and/or were done for reason.
2) Drop mdio 0 probe/register; we don't use ag1xx mdio bus 0.
3) Cosmetic reording of some code (tested) that makes the defintion
more clear.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The CR3000 stock firmware is now irrelevant as it required a now defunct
cloud service. Therefore only build images that use the entire flash
(overwriting stock firwmare-specific partitions that no longer matter),
previously called 'nocloud' images.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The PowerCloud Systems CR3000 was a cloud-managed CPE for a now defunct
NaaS offering. It was previously supported under the ar71xx branch and
this forward ports that support with some notable differences:
1) Since reverting to stock firmware is now irrelevant there is is only
a single openwrt image generated which uses the entire flash rather than
preserving PowerCloud-specific partitions that are unneeded to openwrt--
those partitions will be erased and used by the openwrt image.
2) Rather than use a non-standard probe order for the ethernet devices,
this image uses a set of 'ip link set ethX name ethY' commands very early
in preinit (before the network is used at all), in order to have the the
switch and Wan use the same ethernet names as in previous images.
3) /etc/config/wireless will need to be regenerated as the path to the
wireless device has changed due to differences in ath79 DT for ar93x
compared to ar71xx images.
4) eth0 is wan and eth1 is lan (switch)
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Refreshed all patches
Remove upstreamed patches.
- 103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch
- 403-mtd_fix_cfi_cmdset_0002_status_check.patch
- 001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch
- 001-4.15-08-bcm63xx_enet-correct-clock-usage.patch
- 001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch
- 900-gen_stats-fix-netlink-stats-padding.patch
Introduce a new backported patch to address ext4 breakage, introduced in 4.9.112
- backport-4.9/500-ext4-fix-check-to-prevent-initializing-reserved-inod.patch
This patch has been slightly altered to compensate for a new helper function
introduced in later kernels.
Also add ARM64_SSBD symbol to ARM64 targets still running kernel 4.9
Compile-tested on: ar71xx, bcm2710
Runtime-tested on: ar71xx
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
In 4.14.57, a new symbol for Spectre v4 mitigation was introduced for
ARM64. Add this symbol to all ARM64 targets using kernel 4.14.
This mitigates CVE-2018-3639 on ARM64.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
AT803X_REG_CHIP_CONFIG and AT803X_BT_BX_REG_SEL have been defined
upstream by commit f62265b53ef3 ("at803x: double check SGMII side autoneg")
An existing local patch then added those exact same defines again which
isn't necessary, so remove them.
Fixes: f791fb4af4 ("kernel: add linux 4.9 support")
Fixes: b3f95490b9 ("kernel: generic: Add kernel 4.14 support")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The patch was wrongly removed by a kernel version bump to 4.9.105 in
the believe that it was merged upstream thow it wasn't. This lead to
unrecoverable link losses on devices which use those PHYs such as
many ubnt single-port CPEs.
Fixes: 7dca1bae82 (kernel: bump to 4.9.105)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The previous round of fixes for the 82574 chip cause an issue with
emulated e1000e devices in VMware ESXi 6.5. It also contains changes
that are not strictly necessary. These patches fix the issues introduced
in the previous series, revert the unnecessary changes to avoid
unforeseen fallout, and avoid a case where interrupts can be missed.
The final two patches of this series are already in the kernel, so no
need to include them here.
Patchwork: https://patchwork.ozlabs.org/cover/881776/
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
This changes the DT binding's compatible property to
"ecoscentric,redboot-fis-partitions", removing the existing reference to
Red Hat.
Per the documentation hosted at eCosCentric's website, eCosCentric is
RedBoot's sole commercial maintainer since 2002, and the project has
been under the stewardship of the Free Software Foundation since 2008.
This also updates the property in the Inventel Livebox 1 .dts, the
binding's only current user.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
The OpenMesh A62 is a tri-band device (1x 2.4GHz, 2x 5GHz) with special
filters in front of the RX+TX paths to the 5GHz PHYs. These filtered
channel can in theory still be used by the hardware but the signal strength
is reduced so much that it makes no sense.
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
In the new DT-based pci-ar71xx driver, ar71xx_pci_irq_init() was being
called before populating the PCI controller's device_node struct member.
This led to no IRQ being assigned to connected PCI devices (e.g. ath9k
cards) and caused them to be non-functional aside from simply being
detected.
The previous errors encountered in dmesg were: "irq: no irq domain found
for /ahb/apb/pcie-controller@180c0000 !". /proc/interrupts listed an IRQ
of 0 for the cards.
While this has been only been tested on a yet-to-be-merged RouterStation
Pro target, it should also fix the broken wifi people have reported for
the ath79 WNDR3800 target.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
Add missing definitions for the orange WAN LED on the
TL-WR1043N(D) v4 and v5.
Change the name of a MAC address offset constant to
make it consistent with the format of the
existing constants.
Signed-off-by: Tim Thorpe <tim@tfthorpe.net>
ELECOM WRC-2533GST is a 2.4/5 GHz band 11ac rotuer, based on
MediaTek MT7621A.
Specification:
- MT7621A (2-Core, 4-Threads)
- 128 MB of RAM (DDR3)
- 16 MB of Flash (SPI)
- 4T4R 2.4/5 GHz wifi
- MediaTek MT7615
- 5x 10/100/1000 Mbps Ethernet
- 4x LEDs, 6 keys (2x buttons, 1x slide switch)
- UART header on PCB
- Vcc, GND, TX, RX from ethernet port side
- baudrate: 57600 bps
Flash instruction using factory image:
1. Connect the computer to the LAN port of WRC-2533GST
2. Connect power cable to WRC-2533GST and turn on it
3. Access to "https://192.168.2.1/" and open firmware update
page ("ファームウェア更新")
4. Select the OpenWrt factory image and click apply ("適用")
button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
TP-Link Archer C59v2 is a dual-band AC1350 router based on
Qualcomm/Atheros QCA9561+QCA9886 chips.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- UART header on PCB
Flash instruction:
- via web UI:
1. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
2. Login to router and open the Advanced tab
3. Navigate to System Tools -> Firmware Upgrade
4. Upload firmware using the Manual Upgrade form
- via TFTP:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Keith Maika <keithm@aoeex.com>
This fixes:
drivers/mtd/redboot.c:299:34: error: array type has incomplete element type 'struct of_device_id'
Fixes: 5e8b4be531 ("kernel: add DT binding support to the mtd redboot parser")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
linux,part-probe should be avoided as its only supported with OpenWrt
downstream patch that is going to be dropped eventually.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
On brcm47xx boards, the model ID is the combination of the "boardtype" nvram
variable and an optional supplemental "boardnum" variable while the human
readable model name is usually exposed in the "machine" field of the
/proc/cpuinfo file.
Move the extraction of the board nvram variables and model name string into
the 01_sysinfo file and rework the 01_detect board configuration script to
solely use the prepared sysinfo values without performing own detection
logic.
As a consequence, we can drop the ucidef_set_board_id() and
ucidef_set_model_name() invocations in favor to the generic behaviour
which copies the /tmp/sysinfo/{board_name,model} values into the board.json
"id" and "name" fields respectively.
Since "01_detect" only contains network configuration logic after this
change, move it to "01_network" and rename the contained "detect_by_xxx"
functions to "configure_by_xxx" instead, to avoid potential confusion.
Fixes FS#1576
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
fixes FS#1034, squash fs images fails to boot because of missing ARM BCJ filter decoder
also activate squashf image creation
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
The Traverse LS1043-S board is a router board based on
NXP/Freescale's LS1043 SoC, with 4x1GBase-T, 1 SFP and 1 SFP+,
as well as miniPCIe and M.2 LTE.
Unlike the Layerscape reference boards, the LS1043-S board has
NAND flash and uses the mainline U-Boot.
This patch implements support for the LS1043-S board, as well as
the earlier LS1043-V board. It is our intention that all boards
in this family (LS1043-S and later, Five64) will boot the same binary.
Not included in this patchset are the hwmon drivers not in the kernel
(emc1704,pac1934) or the bootloader.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
This is required for the Traverse LS1043 family, we generate a FIT image
that works on all boards across the family. This is done by creating
multiple configurations that select the right DTB for the board.
The bootloader on these boards is configured to boot like this:
bootm $kernel_load#ls1043s
bootm $kernel_load#ls1043v
This is based on earlier work by Jason Wu for Zynq:
https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040460.html
Modified to add FDT load addresses and multiple configurations with DTB.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
This is required on the Traverse LS1043 boards to support SFP
and xDSL plug-ins.
This will not be needed on kernel 4.14.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
In boards with fdt is impossible to use kmod-w1-gpio-custom.
w1-gpio-custom create platform structure for w1-gpio module,
but if board use fdt, data is ignored in w1-gpio probe.
This workaround fix the problem.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
The device name is corrected to match the hardware-stored (in hard config
flash space) device name.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
The device name is corrected to match the hardware-stored (in hard config
flash space) device name.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested on HC5661A and it now fixes the issue that when enabling sd card
in HC5661A, the wan and 3 lan ports will down.
Known issue:
- When enabling SD card support, the led light of system will down and the rest 2 lights keep working.
Signed-off-by: LoveSy <shana@zju.edu.cn>
There is another thing about crc to do when initialize SD card on
MT7628.
This commit is to fix this init issue.
Signed-off-by: LoveSy <shana@zju.edu.cn>
Qxwlan E750G v8 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (PoE support)
- 2x 10/100/1000 Mbps Ethernet
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E750A v4 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 5G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (USB 2.0 bus only)
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9558)
- 3x 10/100/1000 Mbps Ethernet (one port with PoE support)
- 4x miniPCIe slot (USB 2.0 bus only)
- 1x microSIM slot
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x 3-pos switch
- 1x DC jack for main power input (9-48 V)
- UART (JP5) and LEDs (J8) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
The driver is written in such a way that with a board defintion that
connects a fixed phy, mdio, and switch in a certain way, a kernel oops could
result because of lack of previously probed mdio bus.
This commit allows for easier debugging in this case by casting the
correct blame with serial console messages.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
It's a little noisier but makes it obvious when the ar7240 switch was
connected to the MDIO bus, and to which phy device (or the failure
to do so).
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
NB: Error only appears with ag71xx debug messages and dynamic printk
enabled. This is probably why no one has caught it before.
Previously phy probe debug messages used old (now wrong) functions
to get the phy name for printing. There was also the chance of
a NULL pointer in the event no phy_device was found.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?)
Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0
For ar7240 and older chips, manually create platform device after
ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between
ag71xx_hw_init() and ag71xx_phy_connect().
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Remove mdio1 and phy1 handle. AR8327N is controlled through mdio0.
Add gmac-config for Archer C7.
Remove ucidef_set_interfaces_lan_wan. They can be determined by config_generate automatically.
The following are for adding support for WDR4900 v2/Archer C7 v1 and other
devices that shared the same machine file in ar71xx:
Move mtd partitions to archer-c7-v2.dts. Only Archer C7 v2 has 16M flash.
Flash on Archer C7 v1/TL-WDR4900 v2 is 8M.
Add label for wlan leds. The default trigger for archer c7/wdr4900 is different.
Move wlan5g led to archer-c7-v2.dts. 5G led on WDR4900 is connected to ar9380.
Move rfkill definition to archer-c7-v2.dts. There is no such a button on wdr4900 v2.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
enable mdio1 by default because mdio1 node is a subnode of eth1
and eth1 node is a "simple-mfd", which makes mdio1 disabled when
eth1 isn't enabled.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Most qca devices use 115200n8 as it's default uart baudrate.
Add 'chosen' node for qca953x like other SoCs in ath79 target.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Commit c7efc93 renamed controller name
to qca,ar9340-intc and added some functions but qca9533.dtsi was overlooked.
Correct the dtsi and adust it to the new format
Add gmac and correct reset for cascaded irq and build-in switch
Also add the reference clock to soc dtsi so we don't have to have it in every dts
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
Remove switch reset definition
Fix gmac compatible string (We only need SW_PHY_SWAP and SW_PHY_ADDR_SWAP on qca953x so use ar9330-gmac instead of ar9340-gmac.)
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
gmac0 is always connected to switch phy4 and mdio1 is always needed.
So add phy handle for eth0 and enable mdio1 by default.
Move fixed-link for gmac1 from device dts to ar9331.dtsi because gmac1 is always connected to builtin switch.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Enable mdio1 by default because mdio1 is needed when eth1 is enabled.
PS: If a ar9341 device has only one port and you only want to use gmac0,
change compatible of gmac1 to "syscon", "simple-mfd" in dts.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This patch did several things:
1. Probe the builtin switch as a separated mdio device.
2. Register a separated mdio bus for builtin switch.
3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
We need to have mdio1 belonging to gmac1 initialized before gmac0.
Split it into a separated mdio device to get both mdios ready before probing gmac.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The builtin switch has it's initial valid mac address(00:00:01:00:00:00).
Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device.
Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Only build images for straight OpenWrt (using all flash; wipes out
partitions that contain information only important for accessing a
now defunct cloud service with the stock firmware) since the stock
firmware is now irrelevant.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The wrong MAC addresses (from the point of view of the physical device
label) were being assigned to the wrong interfaces. Fix that.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
While the stock firmware and previous ar71xx versions of openwrt used the
single ethernet port as a DHCP client, for unmodified openwrt usage it
makes more sense to do the standard openwrt thing and make the ethernet
port a static lan with known address so that users can find the device on
the network more easily.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The Skydog cloud service no longer exists hence supporting going back
to stock firmware with cloud support is no longer applicable.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The reset button was incorrectly returning KEY_WPS_BUTTON as the key
code. We want KEY_RESTART., so make that fix.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The PCIe wireless MAC address address is better labelled as WMAC
than MAC to emphasize that it is for a wireless interface.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The CAP324 was an AP for a NaaS offering that is now defunct. While
previously supported in the ar71xx arch, there were some errata (to
be fixed shortly).
Notable differences from ar71xx support:
1) The method of getting the ath9k firmware for the PCIe 2ghz wifi has
changed (due to changes in how the arch handles this), since this device
doesn't use the EEPROM except to get the MAC address of the wifi.
2) /etc/config/wireless will need to be regenerated as the path(s) to
the wireless device(s) have changed.
3) ath79 OpenWrt firmware no longer supports build an image that allows
reverting to stock firmware (as the cloud service no longer exists, the
stock firmware is useless), instead using all of the flash for image and
overlay (less u-boot/env and art).
4) Initial network config treats the ethernet port as a Lan port with
the standard default address (192.168.1.1 unless changed in .config
--e.g. via menuconfig) instead of using DHCP (this was the default for
the stock firmware, however for openwrt use this is rather confusion and
counter-productive as the user has a harder time finding the device on
the network.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Add ath79 arch support for PowerCloud Systems CR5000. Previously
supported under ar71xx (however there are some errors in that support;
to be fixed shortly).
Info:
* This board is based on the Atheros DB120 reference design, but doesn't
use the on-board switch. Instead it attachs GMAC0 to an AR8327 switch.
* It only uses GMAC0 and the WAN is simply a VLAN in the stock firmware.
* It has 64MB RAM and 8MB flash.
* In the dts version we get rid of using 'open-drain' for the AR8327
LED controls.
* As with the platform data version we disable JTAG as this conflicts
with one of the pair of GPIO's required for the power/status LED
(GPIO2 and GPIO4 are used for this LED).
* The pcie card wifi has an EEPROM but gets it's MAC address from
the ART partition.
* The SoC wifi (2.4 GHz) is all from the ART.
* The USB is support comes from the SoC.
NB. This is actually an AR9342 rather than AR9344 but we use the 9344
definitions because there are no relevant differences for this board.
NB: Building only images that don't support reverting to the old
cloud-based firmware as the Skydog cloud service for the CR5000 no
longer exists.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
81d446b045 introduced incomplete
support for this device.
This patch attempts to correct the situation based on OEM source
code.
LED1-3 are GSM mode on OFW (2G/3G/4G) hence unassigned here.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: David Ehrmann <ehrmann@gmail.com>
