110 lines
2.9 KiB
Diff
110 lines
2.9 KiB
Diff
From 840202d23892baaff74be11ec71c3ffc6ad6298e Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Tue, 20 Jan 2015 08:46:55 -0800
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Subject: [PATCH] ARM: dts: imx6 ventana: Add PCI nodes for on-board PCI
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devices
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If the PCI nodes are defined, drivers can access information from the DT.
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For example, the sky2 enet driver can obtain the mac address configured
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from the bootloader (which is applied to the DT node with the ethernet1 alias).
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 38 +++++++++++++++++++++++++++++++++--
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arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 38 +++++++++++++++++++++++++++++++++--
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2 files changed, 72 insertions(+), 4 deletions(-)
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--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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@@ -280,8 +280,42 @@
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reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
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status = "okay";
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- eth1: sky2@8 { /* MAC/PHY on bus 8 */
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- compatible = "marvell,sky2";
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+ pcie@0,0 {
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+ /* 00:00.0 0604: 16c3:abcd root host-bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+
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+ pcie@0,0 {
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+ /* 01:00.0 0604: 10b5:8609 PEX switch bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+
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+ /*
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+ * GigE PCI dev node needs to be defined so that enet
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+ * driver can use it to obtain its boot-loader
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+ * specified MAC
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+ */
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+ pcie@4,0 {
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+ /* 02:04.0 0604: 10b5:8609: PEX port bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x2000 0 0 0 0>;
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+
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+ eth1: pci@0,0 {
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+ /* 04:00.0 0200: 11ab:4380: GigE */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+ compatible = "marvell,sky2";
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+ };
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+ };
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+ };
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};
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};
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--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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@@ -369,8 +369,42 @@
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reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
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status = "okay";
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- eth1: sky2@8 { /* MAC/PHY on bus 8 */
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- compatible = "marvell,sky2";
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+ pcie@0,0 {
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+ /* 00:00.0 0604: 16c3:abcd root host-bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+
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+ pcie@0,0 {
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+ /* 01:00.0 0604: 10b5:8609 PEX switch bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+
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+ /*
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+ * GigE PCI dev node needs to be defined so that enet
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+ * driver can use it to obtain its boot-loader
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+ * specified MAC
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+ */
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+ pcie@8,0 {
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+ /* 02:08.0 0604: 10b5:8609: PEX port bridge */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x4000 0 0 0 0>;
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+
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+ eth1: pci@0,0 {
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+ /* 08:00.0 0200: 11ab:4380: GigE */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ reg = <0x0 0 0 0 0>;
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+ compatible = "marvell,sky2";
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+ };
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+ };
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+ };
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};
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};
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