5a6229a93d
Mediatek has a reference platform that pairs an MT7620A with an MT7530W, where the latter responds on MDIO address 0x1f while both chips respond on 0x0 to 0x4. The driver special-cases this arrangement to make sure it's talking to the right chip, but two different ways in two different places. This patch consolidates the detection without the current requirement of both tests to be separately satisfied in the DTS. Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
159 lines
2.5 KiB
Text
159 lines
2.5 KiB
Text
/*
|
|
* Device Tree file for the Linksys E1700
|
|
*
|
|
* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "linksys,e1700", "ralink,mt7620a-soc";
|
|
model = "Linksys E1700";
|
|
|
|
aliases {
|
|
led-status = &led_power;
|
|
};
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <20>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_power: power {
|
|
label = "e1700:green:power";
|
|
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wan {
|
|
label = "e1700:green:wps";
|
|
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "config";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "i2c", "uartf";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
status = "okay";
|
|
mtd-mac-address = <&factory 0x28>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
mediatek,fixed-link = <1000 1 1 1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy2: ethernet-phy@2 {
|
|
reg = <2>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy3: ethernet-phy@3 {
|
|
reg = <3>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy1f: ethernet-phy@1f {
|
|
reg = <0x1f>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,port4 = "gmac";
|
|
};
|
|
|
|
&wmac {
|
|
ralink,mtd-eeprom = <&factory 0>;
|
|
};
|