8f4dfadd5a
Use diag.sh version used for other targets supporting different leds for the different boot states. The existing led sequences should be the same as before. Signed-off-by: Mathias Kresin <dev@kresin.me>
105 lines
1.8 KiB
Text
105 lines
1.8 KiB
Text
/dts-v1/;
|
|
|
|
#include "TPLINK-8M.dtsi"
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
compatible = "tplink,c20-v4", "mediatek,mt7628an-soc";
|
|
model = "TP-Link Archer C20 v4";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
lan {
|
|
label = "c20-v4:green:lan";
|
|
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_power: power {
|
|
label = "c20-v4:green:power";
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wan {
|
|
label = "c20-v4:green:wan";
|
|
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wan_orange {
|
|
label = "c20-v4:orange:wan";
|
|
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5g {
|
|
label = "c20-v4:green:wlan5g";
|
|
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan2g {
|
|
label = "c20-v4:green:wlan2g";
|
|
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
label = "c20-v4:green:wps";
|
|
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <20>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
rfkill {
|
|
label = "rfkill";
|
|
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RFKILL>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&wmac {
|
|
mtd-mac-address-increment = <(-2)>;
|
|
};
|
|
|
|
ðernet {
|
|
mediatek,portmap = "wllll";
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "i2s", "refclk", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x28000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
mtd-mac-address = <&factory 0xf100>;
|
|
mtd-mac-address-increment = <(-1)>;
|
|
};
|
|
};
|