799d0dddf6
The QorIQ LS2088A processor is built on the Layerscape architecture combining eight ARM A72 processor cores with advanced, high-performance datapath acceleration and network, peripheral interfaces required for networking, telecom, wireless infrastructure, aerospace applications and general-purpose embedded applications. Features summary: - Eight 64-bit ARM v8 Cortex-A72 CPUs - Two 64-bit DDR4 SDRAM memory controller with ECC - One 32-bit DDR3 SDRAM memory controller with ECC - Data path acceleration architecture 2.0 (DPAA2) - Ethernet interfaces - IFC, 4 PCIe, 2 SATA, 2 USB, 1 SDXC, 2 DUARTs etc Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
25 lines
1,023 B
Diff
25 lines
1,023 B
Diff
From c62b4977614e133acc95c61237bcc8fe30581d13 Mon Sep 17 00:00:00 2001
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From: "ying.zhang" <ying.zhang22455@nxp.com>
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Date: Thu, 22 Dec 2016 23:29:39 +0800
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Subject: [PATCH 231/238] driver: clk: qoriq: Add ls2088a clk support
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>wq
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---
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drivers/clk/clk-qoriq.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
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index 6185d6a..efaa9c1 100644
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--- a/drivers/clk/clk-qoriq.c
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+++ b/drivers/clk/clk-qoriq.c
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@@ -1339,6 +1339,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
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CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
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CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
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CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
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+CLK_OF_DECLARE(qoriq_clockgen_ls2088a, "fsl,ls2088a-clockgen", clockgen_init);
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/* Legacy nodes */
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CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
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--
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1.7.9.5
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