layerscape: add ls2088ardb device support

The QorIQ LS2088A processor is built on the Layerscape
architecture combining eight ARM A72 processor cores
with advanced, high-performance datapath acceleration
and network, peripheral interfaces required for
networking, telecom, wireless infrastructure, aerospace
applications and general-purpose embedded applications.

Features summary:
- Eight 64-bit ARM v8 Cortex-A72 CPUs
- Two 64-bit DDR4 SDRAM memory controller with ECC
- One 32-bit DDR3 SDRAM memory controller with ECC
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- IFC, 4 PCIe, 2 SATA, 2 USB, 1 SDXC, 2 DUARTs etc

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
This commit is contained in:
Yutang Jiang 2016-12-28 01:28:02 +08:00 committed by Jo-Philipp Wich
parent 1866368a8a
commit 799d0dddf6
13 changed files with 2094 additions and 0 deletions

View file

@ -106,4 +106,18 @@ endif
endef
TARGET_DEVICES += ls1088ardb
define Device/ls2088ardb
DEVICE_TITLE := ls2088ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls2088ardb uboot-layerscape-$(SUBTARGET)-ls2088ardb mc-binary-ls2088ardb
ifeq ($(SUBTARGET),64b)
DEVICE_DTS = freescale/fsl-ls2088a-rdb
endif
ifeq ($(SUBTARGET),32b)
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls2088a-rdb
endif
IMAGE/firmware.bin = append-ls-dtb $$(DEVICE_DTS) | pad-to 1M | append-kernel | pad-to 6M | \
append-rootfs | pad-rootfs | check-size 24117249
endef
TARGET_DEVICES += ls2088ardb
$(eval $(call BuildImage))

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@ -0,0 +1,29 @@
From fbc31a61b7bcfbc9ae1a8acda547de891f4b8ee4 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 31 Oct 2016 17:50:03 +0800
Subject: [PATCH 238/238] arm64: disable CONFIG_EEPROM_AT24 for
freescale.config
Disable CONFIG_EEPROM_AT24 in freescale.config. Otherwise, i2cdump
for EEPROM will get resource busy issue.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
arch/arm64/configs/freescale.config | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/configs/freescale.config b/arch/arm64/configs/freescale.config
index a31951c..5447d7a 100644
--- a/arch/arm64/configs/freescale.config
+++ b/arch/arm64/configs/freescale.config
@@ -121,7 +121,6 @@ CONFIG_IMX2_WDT=y
CONFIG_HWMON=y
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_INA2XX=y
-CONFIG_EEPROM_AT24=y
# lpuart
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
--
1.7.9.5

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@ -0,0 +1,90 @@
From 6b54054c4053215fe4add195c67daca9a466ba92 Mon Sep 17 00:00:00 2001
From: "ying.zhang" <ying.zhang22455@nxp.com>
Date: Fri, 23 Dec 2016 22:21:22 +0800
Subject: [PATCH] mtd: extend physmap_of to let the device tree specify the
parition probe
This is to support custom partitioning schemes for embedded PPC. To use
define your own mtd_part_parser and then add something like:
linux,part-probe = "my_probe", "cmdlinepart";
To the board's dts file.
If linux,part-probe is not specified then this behaves the same as before.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
---
drivers/mtd/maps/physmap_of.c | 46 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index fef1d1b..e46b4e9 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -112,9 +112,47 @@ static struct mtd_info *obsolete_probe(struct platform_device *dev,
static const char * const part_probe_types_def[] = {
"cmdlinepart", "RedBoot", "ofpart", "ofoldpart", NULL };
+static const char * const *of_get_probes(struct device_node *dp)
+{
+ const char *cp;
+ int cplen;
+ unsigned int l;
+ unsigned int count;
+ const char **res;
+
+ cp = of_get_property(dp, "linux,part-probe", &cplen);
+ if (cp == NULL)
+ return part_probe_types_def;
+
+ count = 0;
+ for (l = 0; l != cplen; l++)
+ if (cp[l] == 0)
+ count++;
+
+ res = kzalloc((count + 1)*sizeof(*res), GFP_KERNEL);
+ if (!res)
+ return NULL;
+ count = 0;
+ while (cplen > 0) {
+ res[count] = cp;
+ l = strlen(cp) + 1;
+ cp += l;
+ cplen -= l;
+ count++;
+ }
+ return res;
+}
+
+static void of_free_probes(const char * const *probes)
+{
+ if (probes != part_probe_types_def)
+ kfree(probes);
+}
+
static const struct of_device_id of_flash_match[];
static int of_flash_probe(struct platform_device *dev)
{
+ const char * const *part_probe_types;
const struct of_device_id *match;
struct device_node *dp = dev->dev.of_node;
struct resource res;
@@ -273,8 +311,14 @@ static int of_flash_probe(struct platform_device *dev)
goto err_out;
ppdata.of_node = dp;
- mtd_device_parse_register(info->cmtd, part_probe_types_def, &ppdata,
+ part_probe_types = of_get_probes(dp);
+ if (!part_probe_types) {
+ err = -ENOMEM;
+ goto err_out;
+ }
+ mtd_device_parse_register(info->cmtd, part_probe_types, &ppdata,
NULL, 0);
+ of_free_probes(part_probe_types);
kfree(mtd_list);
--
1.7.9.5

File diff suppressed because it is too large Load diff

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@ -0,0 +1,138 @@
From e0f9ccd657893d1a10dfbae291900b3045c471fc Mon Sep 17 00:00:00 2001
From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Mon, 7 Nov 2016 10:38:51 +0800
Subject: [PATCH 228/238] ls2088a: add ls2088a its
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
kernel2088a-qds.its | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++
kernel2088a-rdb.its | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 110 insertions(+)
create mode 100644 kernel2088a-qds.its
create mode 100644 kernel2088a-rdb.its
diff --git a/kernel2088a-qds.its b/kernel2088a-qds.its
new file mode 100644
index 0000000..4732954
--- /dev/null
+++ b/kernel2088a-qds.its
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016, Freescale Semiconductor
+ *
+ * Abhimanyu Saini <abhimanyu.saini@nxp.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ description = "QDS Image file for the LS2080A Linux Kernel";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ description = "ARM64 Linux kernel";
+ data = /incbin/("./arch/arm64/boot/Image.gz");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "gzip";
+ load = <0x80080000>;
+ entry = <0x80080000>;
+ };
+ fdt@1 {
+ description = "Flattened Device Tree blob";
+ data = /incbin/("./arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dtb");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ load = <0x90000000>;
+ };
+ ramdisk@1 {
+ description = "LS2 Ramdisk";
+ data = /incbin/("./fsl-image-core-ls2088aqds.ext2.gz");
+ type = "ramdisk";
+ arch = "arm64";
+ os = "linux";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "config@1";
+ config@1 {
+ description = "Boot Linux kernel";
+ kernel = "kernel@1";
+ fdt = "fdt@1";
+ ramdisk = "ramdisk@1";
+ };
+ };
+};
diff --git a/kernel2088a-rdb.its b/kernel2088a-rdb.its
new file mode 100644
index 0000000..151241f
--- /dev/null
+++ b/kernel2088a-rdb.its
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016, Freescale Semiconductor
+ *
+ * Abhimanyu Saini <abhimanyu.saini@nxp.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ description = "RDB Image file for the LS2080A Linux Kernel";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ description = "ARM64 Linux kernel";
+ data = /incbin/("./arch/arm64/boot/Image.gz");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "gzip";
+ load = <0x80080000>;
+ entry = <0x80080000>;
+ };
+ fdt@1 {
+ description = "Flattened Device Tree blob";
+ data = /incbin/("./arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dtb");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ load = <0x90000000>;
+ };
+ ramdisk@1 {
+ description = "LS2 Ramdisk";
+ data = /incbin/("./fsl-image-core-ls2088ardb.ext2.gz");
+ type = "ramdisk";
+ arch = "arm64";
+ os = "linux";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "config@1";
+ config@1 {
+ description = "Boot Linux kernel";
+ kernel = "kernel@1";
+ fdt = "fdt@1";
+ ramdisk = "ramdisk@1";
+ };
+ };
+};
--
1.7.9.5

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@ -0,0 +1,34 @@
From 6183d512e7539033ccfd177d5f5819302d1fda99 Mon Sep 17 00:00:00 2001
From: Lijun Pan <Lijun.Pan@freescale.com>
Date: Wed, 23 Sep 2015 17:06:01 -0500
Subject: [PATCH 234/238] fsl-ifc: fix compilation error when COMPAT not
enabled
When CONFIG_COMPAT is not enabled for cases when 64K pages
are enabled, there are a series of include dependencies that
result in some definitions in sched.h that get missed (e.g.
TASK_NORMAL). Explictly include sched.h to resolve this.
(This seems to be what other drivers do as well)
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
[Stuart: updated subject and commit message]
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
---
drivers/memory/fsl_ifc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
index 03584dc..32c7752 100644
--- a/drivers/memory/fsl_ifc.c
+++ b/drivers/memory/fsl_ifc.c
@@ -35,6 +35,7 @@
#include <linux/irqdomain.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
+#include <linux/sched.h>
struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
--
1.7.9.5

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@ -0,0 +1,35 @@
From cb8a47d43caa2b07a62d81ee0b65c0d16560c276 Mon Sep 17 00:00:00 2001
From: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Date: Fri, 3 Jun 2016 13:15:28 +0530
Subject: [PATCH 229/238] drivers: clk: qoriq: Add ls2088a key to chipinfo
table
---
drivers/clk/clk-qoriq.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 164ac41..6185d6a 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -559,6 +559,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,ls2088a-clockgen",
+ .cmux_groups = {
+ &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
--
1.7.9.5

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@ -0,0 +1,42 @@
From 1b23a4e0f03063f823ea38065c1106f62a56b408 Mon Sep 17 00:00:00 2001
From: Mingkai Hu <mingkai.hu@nxp.com>
Date: Mon, 7 Nov 2016 15:03:51 +0800
Subject: [PATCH 230/238] layerscape/pci: fix linkup issue
commit e6612d785198abbb39142e2acb63f9bff26ab718
[context adjustment]
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/pci/host/pci-layerscape.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
index 00feabf..f85ebcf 100644
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@ -158,11 +158,16 @@ static void ls1021_pcie_host_init(struct pcie_port *pp)
static int ls_pcie_link_up(struct pcie_port *pp)
{
struct ls_pcie *pcie = to_ls_pcie(pp);
- u32 state;
+ u32 state, offset;
+
+ if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL))
+ offset = 0x407fc;
+ else
+ offset = PCIE_LUT_DBG;
- state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
- pcie->drvdata->ltssm_shift) &
- LTSSM_STATE_MASK;
+ state = (ioread32(pcie->lut + offset) >>
+ pcie->drvdata->ltssm_shift) &
+ LTSSM_STATE_MASK;
if (state < LTSSM_PCIE_L0)
return 0;
--
1.7.9.5

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@ -0,0 +1,25 @@
From c62b4977614e133acc95c61237bcc8fe30581d13 Mon Sep 17 00:00:00 2001
From: "ying.zhang" <ying.zhang22455@nxp.com>
Date: Thu, 22 Dec 2016 23:29:39 +0800
Subject: [PATCH 231/238] driver: clk: qoriq: Add ls2088a clk support
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>wq
---
drivers/clk/clk-qoriq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 6185d6a..efaa9c1 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -1339,6 +1339,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls2088a, "fsl,ls2088a-clockgen", clockgen_init);
/* Legacy nodes */
CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
--
1.7.9.5

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@ -0,0 +1,110 @@
From a4be9046c3a3fc39a06089553df8cc19a2abd814 Mon Sep 17 00:00:00 2001
From: Priyanka Jain <Priyanka.Jain@freescale.com>
Date: Tue, 3 Nov 2015 11:25:24 +0530
Subject: [PATCH 233/238] i2c: pca954x: Add option to skip disabling PCA954x
Mux device
On some Layerscape boards like LS2085ARDB/LS2080ARDB,
input pull-up resistors on PCA954x Mux device are
missing on board. So, if mux are disabled after powered-on,
input lines will float leading to incorrect functionality.
Hence, PCA954x Mux device should never be turned-off after
power-on.
Add option to skip disabling PCA954x Mux device
if device tree contians "i2c-mux-never-disable" property
for pca954x device node.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
---
drivers/i2c/muxes/i2c-mux-pca954x.c | 38 +++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index acfcef3..386f86f 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -63,6 +63,7 @@ struct pca954x {
struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS];
u8 last_chan; /* last register value */
+ u8 disable_mux; /* do not disable mux if val not 0 */
};
struct chip_desc {
@@ -174,6 +175,13 @@ static int pca954x_deselect_mux(struct i2c_adapter *adap,
{
struct pca954x *data = i2c_get_clientdata(client);
+#ifdef CONFIG_ARCH_LAYERSCAPE
+ if (data->disable_mux != 0)
+ data->last_chan = chips[data->type].nchans;
+ else
+ data->last_chan = 0;
+ return pca954x_reg_write(adap, client, data->disable_mux);
+#endif
/* Deselect active channel */
data->last_chan = 0;
return pca954x_reg_write(adap, client, data->last_chan);
@@ -201,6 +209,23 @@ static int pca954x_probe(struct i2c_client *client,
if (!data)
return -ENOMEM;
+#ifdef CONFIG_ARCH_LAYERSCAPE
+ /* The point here is that you must not disable a mux if there
+ * are no pullups on the input or you mess up the I2C. This
+ * needs to be put into the DTS really as the kernel cannot
+ * know this otherwise.
+ */
+ data->type = id->driver_data;
+ data->disable_mux = of_node &&
+ of_property_read_bool(of_node, "i2c-mux-never-disable") &&
+ chips[data->type].muxtype == pca954x_ismux ?
+ chips[data->type].enable : 0;
+ /* force the first selection */
+ if (data->disable_mux != 0)
+ data->last_chan = chips[data->type].nchans;
+ else
+ data->last_chan = 0;
+#endif
i2c_set_clientdata(client, data);
/* Get the mux out of reset if a reset GPIO is specified. */
@@ -212,13 +237,19 @@ static int pca954x_probe(struct i2c_client *client,
* that the mux is in fact present. This also
* initializes the mux to disconnected state.
*/
+#ifdef CONFIG_ARCH_LAYERSCAPE
+ if (i2c_smbus_write_byte(client, data->disable_mux) < 0) {
+#else
if (i2c_smbus_write_byte(client, 0) < 0) {
+#endif
dev_warn(&client->dev, "probe failed\n");
return -ENODEV;
}
+#ifndef CONFIG_ARCH_LAYERSCAPE
data->type = id->driver_data;
data->last_chan = 0; /* force the first selection */
+#endif
idle_disconnect_dt = of_node &&
of_property_read_bool(of_node, "i2c-mux-idle-disconnect");
@@ -289,6 +320,13 @@ static int pca954x_resume(struct device *dev)
struct i2c_client *client = to_i2c_client(dev);
struct pca954x *data = i2c_get_clientdata(client);
+#ifdef CONFIG_ARCH_LAYERSCAPE
+ if (data->disable_mux != 0)
+ data->last_chan = chips[data->type].nchans;
+ else
+ data->last_chan = 0;
+ return i2c_smbus_write_byte(client, data->disable_mux);
+#endif
data->last_chan = 0;
return i2c_smbus_write_byte(client, 0);
}
--
1.7.9.5

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@ -0,0 +1,38 @@
From 2f3ea65dc8909cbf4116bd74b3dea8d25749508f Mon Sep 17 00:00:00 2001
From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Wed, 23 Nov 2016 11:29:45 +0800
Subject: [PATCH 235/238] pci/layerscape: fix pci lut offset issue
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/pci/host/pci-layerscape.c | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
index f85ebcf..00feabf 100644
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@ -158,16 +158,11 @@ static void ls1021_pcie_host_init(struct pcie_port *pp)
static int ls_pcie_link_up(struct pcie_port *pp)
{
struct ls_pcie *pcie = to_ls_pcie(pp);
- u32 state, offset;
-
- if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL))
- offset = 0x407fc;
- else
- offset = PCIE_LUT_DBG;
+ u32 state;
- state = (ioread32(pcie->lut + offset) >>
- pcie->drvdata->ltssm_shift) &
- LTSSM_STATE_MASK;
+ state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
+ pcie->drvdata->ltssm_shift) &
+ LTSSM_STATE_MASK;
if (state < LTSSM_PCIE_L0)
return 0;
--
1.7.9.5

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@ -0,0 +1,84 @@
From df2373ca941741f3f66750241a048ad4e2ff2c91 Mon Sep 17 00:00:00 2001
From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Thu, 24 Nov 2016 11:47:45 +0800
Subject: [PATCH 236/238] clk: add API of clks
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/clk/clk.c | 19 +++++++++++++++++++
include/linux/clk-provider.h | 1 +
include/linux/clk.h | 9 +++++++++
3 files changed, 29 insertions(+)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index f13c3f4..0f6bcf5 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -359,6 +359,19 @@ static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
return core->parents[index];
}
+struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
+{
+ struct clk_core *parent;
+
+ if (!clk)
+ return NULL;
+
+ parent = clk_core_get_parent_by_index(clk->core, index);
+
+ return !parent ? NULL : parent->hw->clk;
+}
+EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
+
struct clk_hw *
clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
{
@@ -2033,6 +2046,12 @@ static const struct file_operations clk_summary_fops = {
.release = single_release,
};
+unsigned int clk_get_num_parents(struct clk *clk)
+{
+ return !clk ? 0 : clk->core->num_parents;
+}
+EXPORT_SYMBOL_GPL(clk_get_num_parents);
+
static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
{
if (!c)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 7cd0171..77dfd61 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -650,6 +650,7 @@ unsigned int clk_hw_get_num_parents(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw,
unsigned int index);
+struct clk *clk_get_parent_by_index(struct clk *clk, u8 index);
unsigned int __clk_get_enable_count(struct clk *clk);
unsigned long clk_hw_get_rate(const struct clk_hw *hw);
unsigned long __clk_get_flags(struct clk *clk);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 0df4a51..1df90e3 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -392,6 +392,15 @@ int clk_set_parent(struct clk *clk, struct clk *parent);
struct clk *clk_get_parent(struct clk *clk);
/**
+ * clk_get_num_parents - get number of possible parents
+ * @clk: clock source
+ *
+ * Returns the number of possible parents of this clock,
+ * which can then be enumerated using clk_get_parent_by_index().
+ */
+unsigned int clk_get_num_parents(struct clk *clk);
+
+/**
* clk_get_sys - get a clock based upon the device name
* @dev_id: device name
* @con_id: connection ID
--
1.7.9.5

View file

@ -0,0 +1,103 @@
From 562f1311b529d81662ed41786b8d240db2e2ff51 Mon Sep 17 00:00:00 2001
From: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Date: Tue, 6 Dec 2016 15:30:39 +0800
Subject: [PATCH 237/238] pcie/ls208x: use unified compatible
"fsl,ls2080a-pcie" for ls208x
To avoid unnecessary reduplication, let's use unified compatible
"fsl,ls2080a-pcie" for ls2080a, ls2085a, ls2088a.
This patch fixes issue of pcie not working on ls2088a.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 12 ++++--------
drivers/pci/host/pci-layerscape.c | 13 ++++++++-----
2 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
index bd69942..07c917b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -513,8 +513,7 @@
};
pcie1: pcie@3400000 {
- compatible = "fsl,ls2088a-pcie", "fsl,ls2080a-pcie",
- "fsl,ls2085a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -539,8 +538,7 @@
};
pcie2: pcie@3500000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2080a-pcie",
- "fsl,ls2085a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -565,8 +563,7 @@
};
pcie3: pcie@3600000 {
- compatible = "fsl,ls2088a-pcie", "fsl,ls2080a-pcie",
- "fsl,ls2085a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -591,8 +588,7 @@
};
pcie4: pcie@3700000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2080a-pcie",
- "fsl,ls2085a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
0x38 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
index 00feabf..3e2100d 100644
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@ -158,9 +158,14 @@ static void ls1021_pcie_host_init(struct pcie_port *pp)
static int ls_pcie_link_up(struct pcie_port *pp)
{
struct ls_pcie *pcie = to_ls_pcie(pp);
- u32 state;
+ u32 state, offset;
+
+ if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL))
+ offset = 0x407fc;
+ else
+ offset = pcie->drvdata->lut_dbg;
- state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
+ state = (ioread32(pcie->lut + offset) >>
pcie->drvdata->ltssm_shift) &
LTSSM_STATE_MASK;
@@ -261,7 +266,6 @@ static const struct of_device_id ls_pcie_of_match[] = {
{ .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },
{ .compatible = "fsl,ls1088a-pcie", .data = &ls1088_drvdata },
{ .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
- { .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata },
{ },
};
MODULE_DEVICE_TABLE(of, ls_pcie_of_match);
@@ -315,8 +319,7 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
if (!ls_pcie_is_bridge(pcie))
return -ENODEV;
- if (of_device_is_compatible(pdev->dev.of_node, "fsl,ls2085a-pcie") ||
- of_device_is_compatible(pdev->dev.of_node, "fsl,ls2080a-pcie") ||
+ if (of_device_is_compatible(pdev->dev.of_node, "fsl,ls2080a-pcie") ||
of_device_is_compatible(pdev->dev.of_node, "fsl,ls1088a-pcie")) {
int len;
const u32 *prop;
--
1.7.9.5