164 lines
3.6 KiB
C
164 lines
3.6 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2007 OpenWrt.org
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* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <asm/io.h>
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#include <asm/bootinfo.h>
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#include <asm/addrspace.h>
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#include <adm5120_info.h>
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#include <adm5120_defs.h>
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#include <adm5120_switch.h>
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#include <adm5120_mpmc.h>
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#if 1
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# define mem_dbg(f, a...) printk("mem_detect: " f, ## a)
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#else
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# define mem_dbg(f, a...)
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#endif
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unsigned long adm5120_memsize;
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#define MEM_READL(a) __raw_readl((void __iomem *)(a))
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#define MEM_WRITEL(a, v) __raw_writel((v), (void __iomem *)(a))
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static int __init mem_check_pattern(u8 *addr, unsigned long offs)
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{
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u32 *p1 = (u32 *)addr;
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u32 *p2 = (u32 *)(addr+offs);
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u32 t,u,v;
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/* save original value */
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t = MEM_READL(p1);
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u = MEM_READL(p2);
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if (t != u)
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return 0;
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v = 0x55555555;
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if (u == v)
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v = 0xAAAAAAAA;
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mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
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MEM_WRITEL(p1, v);
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adm5120_ndelay(1000);
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u = MEM_READL(p2);
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mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
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/* restore original value */
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MEM_WRITEL(p1, t);
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return (v == u);
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}
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static void __init adm5120_detect_memsize(void)
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{
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u32 memctrl;
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u32 size, maxsize;
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u8 *p;
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memctrl = SW_READ_REG(MEMCTRL);
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switch (memctrl & MEMCTRL_SDRS_MASK) {
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case MEMCTRL_SDRS_4M:
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maxsize = 4 << 20;
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break;
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case MEMCTRL_SDRS_8M:
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maxsize = 8 << 20;
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break;
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case MEMCTRL_SDRS_16M:
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maxsize = 16 << 20;
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break;
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default:
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maxsize = 64 << 20;
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break;
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}
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mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
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/* detect size of the 1st SDRAM bank */
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p = (u8 *)KSEG1ADDR(0);
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for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
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if (mem_check_pattern(p, size)) {
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/* mirrored address */
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mem_dbg("mirrored data found at offset 0x%08X\n", size);
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break;
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}
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}
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mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
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adm5120_memsize = size;
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if (size != maxsize)
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/* 2nd bank is not supported */
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goto out;
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if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
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/* 2nd bank is disabled */
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goto out;
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/*
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* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
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* are missing.
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*/
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mem_dbg("check presence of 2nd bank\n");
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p = (u8 *)KSEG1ADDR(maxsize+size-4);
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if (mem_check_pattern(p, 0)) {
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adm5120_memsize += size;
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}
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if (maxsize != size) {
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/* adjusting MECTRL register */
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memctrl &= ~(MEMCTRL_SDRS_MASK);
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switch (size>>20) {
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case 4:
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memctrl |= MEMCTRL_SDRS_4M;
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break;
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case 8:
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memctrl |= MEMCTRL_SDRS_8M;
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break;
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case 16:
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memctrl |= MEMCTRL_SDRS_16M;
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break;
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default:
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memctrl |= MEMCTRL_SDRS_64M;
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break;
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}
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SW_WRITE_REG(MEMCTRL, memctrl);
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}
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out:
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mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
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size >>20);
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}
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void __init adm5120_mem_init(void)
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{
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adm5120_detect_memsize();
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add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
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}
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