fix memory size detection (#2244)

SVN-Revision: 8728
This commit is contained in:
Gabor Juhos 2007-09-10 09:54:35 +00:00
parent e83d637f65
commit ac15780234
2 changed files with 11 additions and 7 deletions

View file

@ -50,10 +50,11 @@ static int __init mem_check_pattern(u8 *addr, unsigned long offs)
u32 *p1 = (u32 *)addr;
u32 *p2 = (u32 *)(addr+offs);
u32 t,u,v;
/* save original value */
t = MEM_READL(p1);
u = MEM_READL(p2);
u = MEM_READL(p2);
if (t != u)
return 0;
@ -64,10 +65,7 @@ static int __init mem_check_pattern(u8 *addr, unsigned long offs)
mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
MEM_WRITEL(p1, v);
/* flush write buffers */
MPMC_WRITE_REG(CTRL, MPMC_READ_REG(CTRL) | MPMC_CTRL_DWB);
adm5120_ndelay(1000);
u = MEM_READL(p2);
mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);

View file

@ -52,8 +52,14 @@
#define MPMC_REG_SC3 0x0260
/* Control register bits */
#define MPMC_CTRL_AM ( 1 << 1 )
#define MPMC_CTRL_DWB ( 1 << 3 )
#define MPMC_CTRL_AM ( 1 << 1 ) /* Address Mirror */
#define MPMC_CTRL_LPM ( 1 << 2 ) /* Low Power Mode */
#define MPMC_CTRL_DWB ( 1 << 3 ) /* Drain Write Buffers */
/* Status register bits */
#define MPMC_STATUS_BUSY ( 1 << 0 ) /* Busy */
#define MPMC_STATUS_WBS ( 1 << 1 ) /* Write Buffer Status */
#define MPMC_STATUS_SRA ( 1 << 2 ) /* Self-Refresh Acknowledge*/
/* Dynamic Control register bits */
#define MPMC_DC_CE ( 1 << 0 )