Commit graph

450 commits

Author SHA1 Message Date
Piotr Dymacz
f478fba663 ar71xx: add support for Zbtlink ZBT-WE1526
Zbtlink ZBT-WE1526 is based on Qualcomm Atheros QCA9531 v2.
Short specification:

- 650/400/200 MHz (CPU/DDR/AHB)
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- two external, non-detachable antennas
- 8x LED, 1x button
- UART header (pinout: VCC, RX, TX, GND)

Flash instruction:

Use sysupgrade in vendor firmare which is based on OpenWrt.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2016-08-18 09:49:18 +02:00
Zhao Gang
42305ae24a ar71xx: add support for gl-mifi
This add initial support for gl-mifi.
Product page: http://www.gl-inet.com/mifi/

Signed-off-by: Zhao Gang <gang.zhao.42@gmail.com>
2016-07-24 06:38:30 +02:00
Zhao Gang
d963ddf042 ar71xx: add support for gl-ar300m
This add initial support for gl-ar300m router.
Product page: http://www.gl-inet.com/ar300m/

Signed-off-by: Zhao Gang <gang.zhao.42@gmail.com>
2016-07-20 00:21:48 +02:00
Piotr Dymacz
d2c9b169b3 ar71xx: add support for jjPlus JWAP230
jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337.
Short specification:

- 720/600/200 MHz (CPU/DDR/AHB)
- 2x 10/100/1000 Mbps Ethernet
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm
- 3x MMCX connectors
- power input: 802.3at PoE or wide range DC (36-57 V)
- optional 802.3af PSE
- 1x mini-PCIe connector with PCIe, USB buses and SIM slot
- 1x mini-PCIe connector with PCIe bus
- 1x USB type-A connector
- 6x LED, 1x button (hardware reset)
- RS232 (MAX3223) and (E)JTAG headers

Default configuration:

- WAN on eth1 (RJ45 near LEDs with PoE input)
- LAN on eth0 (RJ45 near DC jack)
- left top LED set to be status LED
- all LEDs configurable form user space

Flash instruction (do it under U-Boot, using RS232):

1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2016-07-13 20:03:10 +02:00
Piotr Dymacz
e767980eb8 ar71xx: add support for Wallys DR531
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:

- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers

Default configuration:

- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset

Flash instruction (do it under U-Boot, using UART):

1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2016-07-13 20:03:10 +02:00
Felix Fietkau
be08fdd007 ar71xx: disable pdata->use_flow_control for QCA9558
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-06-27 12:12:40 +02:00
Felix Fietkau
75b2105cd3 ar71xx: rename ethernet pdata->builtin_switch to use_flow_control
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-06-27 12:12:40 +02:00
Felix Fietkau
26b8db2537 ar71xx: enable flow control for ethernet MACs with built-in switch
Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-06-26 11:21:17 +02:00
Alexander Couzens
c2e0c41842 Revert "ar71xx/cpe510: use second wifi calibration table"
Using the high power table can damage the device in some cases.

This reverts commit bf27ac019c.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
2016-06-16 21:11:24 -07:00
Arne Zachlod
f869ffdd62 ar71xx: mach-ubnt-xm.c convert patches to mach file
Signed-off-by: Arne Zachlod <arne@nerdkeller.org>
2016-06-13 22:51:43 +02:00
Allan Nick Pedrana
e61fe4e4d7 ar71xx: add support for OpenEmbed SOM9331
This patch adds the target profile SOM9331 and configures hardware
functionality for the 3x Eth Ports & corresponding LED's, the USB Host,
the USART to USB bridge and the System LED.

Signed-off-by: Allan Nick Pedrana <nik9993@gmail.com>
2016-06-07 11:21:55 +02:00
Felix Fietkau
7eeb254cc4 treewide: replace nbd@openwrt.org with nbd@nbd.name
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-06-07 08:58:42 +02:00
KeLei Liang
563e9d5e1b ar71xx: add WRTnode2Q support
Signed-off-by: KeLei Liang <xzmu@wrtnode.com>
2016-06-06 14:58:11 +02:00
Stijn Segers
d2a91f9853
ar71xx: Fix TL-WR841N v11 LEDs, use separate machine
Signed-off-by: Stijn Segers <francesco.borromini@inventati.org>
2016-05-31 17:36:51 +02:00
Alexander Couzens
bf27ac019c ar71xx/cpe510: use second wifi calibration table
The cpe510 has two calibration tables. The first calibration
table requires to modify ath9k driver to work (patched tx gain table).

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
2016-05-23 13:39:50 +02:00
Alexander Couzens
c5ff273d85 ar71xx/cpe510: split profile into 2 profiles cpe210 and cpe510
Split profile into 2GHz and 5GHz. The 5GHz devices are
quite "special". The 2 GHz works perfect.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
2016-05-23 13:39:49 +02:00
Sven Eckelmann
f7719dca71 ar71xx: add kernel support for the OpenMesh MR1750v2
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
2016-05-23 12:19:25 +02:00
Sven Eckelmann
8010e8a370 ar71xx: add kernel support for the OpenMesh OM2P-HSv3
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
2016-05-23 12:19:23 +02:00
Alexander Couzens
94e23bf740 ar71xx/cpe510: enable LNA for CPE210/220/510/520
The LNA improves the rx path. Within a simple test setup
it improved the signal from -60dbm to -40dbm.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
2016-05-20 13:18:57 +02:00
Felix Fietkau
5b34dffcbd ar71xx: fix DDR write buffer flushing issues with 4.4
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-05-15 20:55:39 +02:00
Cezary Jackiewicz
0b45bec22c
ar71xx: add support for TP-LINK TL-WR842N/ND v3
- CPU QCA9531-BL3A
- RAM: 64MB
- flash: 16MB
- USB

AP143 platform, similar to tl-wr841n v10/v11, but with USB

Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
2016-05-14 21:45:16 +02:00
John Crispin
cc831e23e1 ar71xx: add proper support for Archer-C7 V2
This has minor differences to the V1

Signed-off-by: John Crispin <john@phrozen.org>
2016-05-14 21:26:08 +02:00
John Crispin
f816472f78 ar71xx: Fix TP-LINK Archer-C5/C7 v2 rfkill
Fix ARCHER_C7_GPIO_BTN_RFKILL, which is attached to GPIO23

Signed-off-by: Lars Buerding <lb.wrt@metatux.net>
2016-05-12 03:29:36 +02:00
P.Wassi
8307c2fe68 ar71xx: Add support for Ubiquiti UniFi AP AC PRO
Add support for the Ubiquiti UniFi AP AC PRO
Signed-off-by: P.Wassi <p.wassi at gmx.at>
2016-05-12 03:29:36 +02:00
P.Wassi
c855e70491 ar71xx: Rename unifiac to unifiac-lite
To avoid confusion with different unifiac devices, rename existing target
"unifiac" to "unifiac-lite", before "unifiac-pro" is introduced.

Signed-off-by: P.Wassi <p.wassi at gmx.at>
2016-05-12 03:29:36 +02:00
blogic
75629fb2a8 ar71xx: add TP-Link TL-WR810N support
This patch adds support for the TP-Link TL-WR810N.
https://wiki.openwrt.org/toh/tp-link/tl-wr810n

Signed-off-by: Jens Steinhauser <jens.steinhauser@gmail.com>

SVN-Revision: 49286
2016-05-10 10:43:12 +02:00
blogic
ba3ed629ea ar71xx: Fix eth0 support for Ubiquiti UniFi AP AC
Fix eth0 support for the Ubiquiti UniFi AP AC
Signed-off-by: Paul Wassi <p.wassi at gmx.at>

SVN-Revision: 49277
2016-05-10 10:43:12 +02:00
John Crispin
ee53a240ac ar71xx: Add support for the OMYlink OMY-G1
https://wiki.openwrt.org/toh/omylink/omy-g1

http://www.omylink.com/

Signed-off-by: L. D. Pinney <ldpinney@gmail.com>

SVN-Revision: 49258
2016-04-26 11:44:36 +00:00
Hauke Mehrtens
9759aba429 ar71xx: fix build error
This fixes a build error introduced in r49193.

This closes #22230

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 49194
2016-04-17 22:03:58 +00:00
Hauke Mehrtens
00675abc3b ar71xx: fix build with kernel 4.4
The file linux/mdio-gpio.h was moved to linux/platform_data/mdio-gpio.h
in kernel 4.4

Reported-by: Arjen de Korte <arjen+openwrt@de-korte.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 49193
2016-04-17 19:10:13 +00:00
John Crispin
5f1a82ec4f ar71xx: add TP-Link TL-WA901ND-v4 support
Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>

SVN-Revision: 49158
2016-04-09 10:26:46 +00:00
John Crispin
d9799dea89 ar71xx: add support for Compex WPJ342
OpenWrt can be flashed with following uboot commands:

tftpboot 0x80500000 openwrt-ar71xx-generic-wpj342-16M-squashfs-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize

Signed-off-by: Christian Mehlis <christian@m3hlis.de>

SVN-Revision: 49157
2016-04-09 10:26:41 +00:00
John Crispin
886cb9a744 ar71xx: add kernel support for the OpenMesh OM5P-ACv2 board
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49149
2016-04-09 10:26:15 +00:00
John Crispin
69965212bd ar71xx: add kernel support for the OpenMesh OM5P-AC board
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49141
2016-04-09 10:25:47 +00:00
John Crispin
8e2a35afc6 ar71xx: WPN824N: enable buttons
Enable buttons connected to the GPIOs of the AR9285.

Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>

SVN-Revision: 49109
2016-04-01 07:12:07 +00:00
John Crispin
38a48a9b42 ar71xx: WPN824N: set WLAN LED name
Make use of ap9x_pci_setup_wmac_led_name() to set the name of the WLAN
LED.

Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>

SVN-Revision: 49108
2016-04-01 07:12:03 +00:00
John Crispin
ba2d1ccffa ar71xx: WNR2200: enable control of all LEDs and buttons
This patch provides full GPIO support for WNR2200 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.

Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>

SVN-Revision: 49101
2016-04-01 07:11:34 +00:00
John Crispin
3da1ef38c1 ar71xx: WNR2200: fix for random WLAN MAC
Fix for invalid/random/duplicate WLAN MAC address in WNR2200.
Permanent platform MAC is calculated and assigned during system startup.
WLAN MAC follows wired Ethernet interface addresses.

Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>

SVN-Revision: 49100
2016-04-01 07:11:27 +00:00
Luka Perkov
8258f8edb6 ar71xx: cosmetic fix of alfa ap120c/ap96 ordering
Signed-off-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 49086
2016-03-24 21:09:34 +00:00
Luka Perkov
ebaba15331 ar71xx: add support for ap120c
Signed-off-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 49082
2016-03-23 22:31:38 +00:00
John Crispin
5b2d89f060 ar71xx: WNR1000v2: enable control of all LEDs and buttons
This patch provides full GPIO support for WNR1000v2 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.

Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>

SVN-Revision: 49076
2016-03-23 12:52:35 +00:00
John Crispin
58143e9b65 Revert "ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg"
Not all mach-* files set all boards correctly in ETH_CFG. They depend on
some preset values by u-boot which were not previously modified by
ath79_setup_qca955x_eth_cfg. Avoiding to modify them in this function keeps
it backward compatible for these boards.

This reverts commit 119b8ab2c2eac237ec4e9c4d0ed53df22b5c6978.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49072
2016-03-23 12:52:20 +00:00
John Crispin
b269a3520d Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x"
The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.

This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49071
2016-03-23 12:52:17 +00:00
John Crispin
26d18d4e07 ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR1750
The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR1750 can be used instead.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49070
2016-03-23 12:52:12 +00:00
John Crispin
bdf76faa3e ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR900
The MR900 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR900 can be used instead.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49069
2016-03-23 12:52:09 +00:00
John Crispin
1cdd3403ba ar71xx: WNR1000v2: fix for random WLAN MAC
Fix for invalid/random WLAN MAC address in WNR1000v2. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses. This is the same fix as for WNR2000v3
and WNR612v2.

Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>

SVN-Revision: 49051
2016-03-20 14:41:58 +00:00
John Crispin
4d6c4994fc ar71xx: Use PHY fixups for Open Mesh MR1750
The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.

This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.

Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49031
2016-03-16 09:27:14 +00:00
John Crispin
ebcce35be4 ar71xx: Use PHY fixups for Open Mesh MR900
The delays of PHY/MAC on the MR900 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.

This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.

Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49030
2016-03-16 09:27:11 +00:00
John Crispin
22c5f96c6b ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x
Some u-boot versions for QCA955x change the delays based on the link speed
during boot. This usually breaks the support of other linkspeeds when
OpenWrt is booted. It also conflicts with the
at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own
values in QCA955X_GMAC_REG_ETH_CFG.

The default RGMII values from the Atheros u-boot are currently used to
preset the existing mach files. These may have to be adjusted for boards
using different values but which are not currently set them explicitely in
OpenWrt.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Christian Beier <cb@shoutrlabs.com>
Cc: Chris R Blake <chrisrblake93@gmail.com>
Cc: Benjamin Berg <benjamin@sipsolutions.net>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
Cc: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Dirk Neukirchen <dirkneukirchen@web.de>
Cc: Christian Mehlis <christian@m3hlis.de>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 49029
2016-03-16 09:27:08 +00:00
John Crispin
be68f34708 ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg
Some u-boot versions for QCA955x set currently not cleared bits depending
on the used link speed. This breaks the rx/tx under OpenWrt. The mach-*.c
file is responsible to select the correct configuration bits and thus the
ath79_setup_qca955x_eth_cfg has to clear the unset.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49028
2016-03-16 09:27:04 +00:00