Without this patch swconfig will only allow setting up a total of 16
VLANs, with VLAN ID range of 0-15.
Tested on ubnt-erx.
Signed-off-by: Antonis Kanouras <antonis@metadosis.eu>
This flag was added to 4.9 with upstream commit
76a4707de5e18dc32d9cb4e990686140c5664a15.
Signed-off-by: Victor Shyba <victor1984@riseup.net>
[refresh and adjust platform patches, fix commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Bump & refresh patches for all 4.4 targets.
Compile & run tested: ar71xx Archer C7 v2
Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
This patch add the 3G modem DWM-158 to the usb-serial option driver.
The DWM-158 is a pcie 3G modem. It is embedded in the DWR-512 modem
supportet by lede. The patch has been submitted and merged in the upstream
linux-next repository.
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
By default, forwarding between all ports is allowed on init. This is
problematic in cases where some ports are supposed to be isolated from
each other, most commonly LAN/WAN separation.
REG_ESW_PORT_PCR(port) has a destination mask for a particular port,
controlling what other ports it is allowed to send packets to.
Instead of initializing all to 0xff (all ports), allow each physical
port to send to the CPU port, and the CPU port to send to all other
ports.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
fix in sdhci Use ralink_soc == MT762X_SOC_MT7621AT instead of CONFIG_SOC_MT7621 which is
wrong and breaks builds on mt7620a-similar platforms (MT7621, MT7688)
Signed-off-by: Andrew Yong <me@ndoo.sg>
Enable work-arounds present in the code commented-out but needed to write to
sdcard on mt7621 which currently causes kernel to oops when engaging in
serious writing to sdcard. With this change applied, there are still
occasional warnings thrown by the mmc driver, however, at least it no longer
crashes the system and even large writes (full-card dump/erase/write/compare)
don't show any corruption.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Rebase to LEDE and added "CONFIG_SOC_MT7621" check to ensure non-MT7621 devices do not face performance regressions.
Signed-off-by: Andrew Yong <me@ndoo.sg>
This patch bumps the 4.4 kernel from .28 to .30 and refreshes the patches.
Compile-tested on ar71xx, x86/64, ramips/mt7621, brcm47xx and kirkwood.
Run-tested on ar71xx & ramips/mt7621, brcm47xx and kirkwood (last two confirmed
by P. Wassi).
Signed-off-by: Stijn Segers <francesco.borromini@inventati.org>
Refresh patches for all targets that support kernel 4.4.
compile/run-tested on brcm2708/bcm2710 only.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Forgot to update kernel-version.mk, so updated patch. Compile-tested on x86/64 and ar71xx; run-tested on x86/64 and ar71xx.
Signed-off-by: Stijn Segers <francesco.borromini@inventati.org>
Refresh patches for all targets that support kernel 4.4.
Compile-tested on all targets that use kernel 4.4 and aren't marked broken.
Runtime-tested on ar71xx, octeon and x86/64.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Pinmux for rgmii needs to be set to rgmii, not gpio.
Hide the ESW switch on boot (using new rgmii esw devicetree attribute).
Also add a Sitecom-specific profile, since the image needs to include
the rtl8366 kernel driver.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
* add rt_i2c structure to store driver data
* rewrite read/write check function and add i2c error status check.
so we don't need to wait until time out.
* add 10 bits address support. according to the data sheet i think
it is possible. but i haven't verify it.
* the most important is start transfer only need once. otherwise
it cause I2C_STARTERR status.
* add set i2c clock speed register by dts options "clock-frequency".
not just hard code it.
* add mt7621 i2c driver. i just copy i2c-ralink.c and change register
names. and the hardware don't support error status. so i remove it.
but the logic is the same.
Signed-off-by: Michael Lee <igvtee@gmail.com>
* remove mt7620-wm8960.c use simple card and DTS to do it
* add old chips support
* add 12Mhz refclk setup. this is hard code. need use clock framework
rewrite it
* add interrupt error status support for debug. default disable it.
because it cause to many interrupts
* add setup bclk suport not hard code it
* add 24 bits support for mt7628. not verified
* use regmap api to control registers
* add txdma-req/rxdma-req DTS params for DMA use
Signed-off-by: Michael Lee <igvtee@gmail.com>
* add rt_i2c structure to store driver data
* rewrite read/write check function and add i2c error status check.
so we don't need to wait until time out.
* add 10 bits address support. according to the data sheet i think
it is possible. but i haven't verify it.
* the most important is start transfer only need once. otherwise
it cause I2C_STARTERR status.
* add set i2c clock speed register by dts options "clock-frequency".
not just hard code it.
* add mt7621 i2c driver. i just copy i2c-ralink.c and change register
names. and the hardware don't support error status. so i remove it.
but the logic is the same.
Signed-off-by: Michael Lee <igvtee@gmail.com>
* fix compiler error. device_control operation not support now.
* add old chips support 8 channels. new chips support 16 channels.
* add mt7621 hsdma driver. data sheet says it has two channels.
but after test only one channel support.
* add memory to memory DMA support. i use dmatest kernel module to
verify this function. on rt305x it will copy more data. on mt7621
only two channels can works at the same time. these two chips
maybe have hardware bugs. because on other chips don't have these bugs.
* use tasklet to handle remaining dma requests.
Signed-off-by: Michael Lee <igvtee@gmail.com>
This patch allows configuring ports to be disabled in the device tree; this
saves power, since disabling ports here actually disables power to ethernet
PHYs.
Line 444 enables all ethernet ports, so line 487 is getting zero ports to be
disabled, except for port 5 in SoCs where this is not implemented as it will
be sticky disabled in register POC0. Because of this, the code will still read
the switch configuration and OR it to the device tree setting.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 49290
Line 444 is actually enabling all switch ports by setting the disable bits
to 0. This needs to be done because the bootloader sets all ports to disabled
by default (which is the case for at least one router based on RT5350).
So, this patch fixes the comment in line 443.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 49289
