ramips: add i2s clocks
Signed-off-by: Michael Lee <igvtee@gmail.com>
This commit is contained in:
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921d782eb7
commit
6f61990d15
1 changed files with 30 additions and 3 deletions
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@ -1,10 +1,35 @@
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--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -446,6 +446,7 @@ void __init ralink_clk_init(void)
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@@ -389,6 +389,7 @@ void __init ralink_clk_init(void)
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unsigned long sys_rate;
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unsigned long dram_rate;
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unsigned long periph_rate;
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+ unsigned long pcmi2s_rate;
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xtal_rate = mt7620_get_xtal_rate();
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@@ -403,6 +404,7 @@ void __init ralink_clk_init(void)
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cpu_rate = MHZ(575);
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dram_rate = sys_rate = cpu_rate / 3;
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periph_rate = MHZ(40);
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+ pcmi2s_rate = MHZ(480);
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ralink_clk_add("10000d00.uartlite", periph_rate);
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ralink_clk_add("10000e00.uartlite", periph_rate);
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@@ -414,6 +416,7 @@ void __init ralink_clk_init(void)
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dram_rate = mt7620_get_dram_rate(pll_rate);
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sys_rate = mt7620_get_sys_rate(cpu_rate);
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periph_rate = mt7620_get_periph_rate(xtal_rate);
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+ pcmi2s_rate = periph_rate;
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pr_debug(RFMT("XTAL") RFMT("CPU_PLL") RFMT("PLL"),
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RINT(xtal_rate), RFRAC(xtal_rate),
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@@ -435,6 +438,8 @@ void __init ralink_clk_init(void)
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ralink_clk_add("cpu", cpu_rate);
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ralink_clk_add("10000100.timer", periph_rate);
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ralink_clk_add("10000120.watchdog", periph_rate);
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+ ralink_clk_add("10000900.i2c", periph_rate);
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+ ralink_clk_add("10000a00.i2s", pcmi2s_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", periph_rate);
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@ -20,21 +45,23 @@
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ralink_clk_add("480000.wmac", wmac_rate);
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--- a/arch/mips/ralink/rt305x.c
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+++ b/arch/mips/ralink/rt305x.c
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@@ -200,6 +200,7 @@ void __init ralink_clk_init(void)
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@@ -200,6 +200,8 @@ void __init ralink_clk_init(void)
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ralink_clk_add("cpu", cpu_rate);
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ralink_clk_add("sys", sys_rate);
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+ ralink_clk_add("10000900.i2c", uart_rate);
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+ ralink_clk_add("10000a00.i2s", uart_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000100.timer", wdt_rate);
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--- a/arch/mips/ralink/rt3883.c
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+++ b/arch/mips/ralink/rt3883.c
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@@ -108,6 +108,7 @@ void __init ralink_clk_init(void)
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@@ -108,6 +108,8 @@ void __init ralink_clk_init(void)
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ralink_clk_add("10000100.timer", sys_rate);
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ralink_clk_add("10000120.watchdog", sys_rate);
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ralink_clk_add("10000500.uart", 40000000);
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+ ralink_clk_add("10000900.i2c", 40000000);
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+ ralink_clk_add("10000a00.i2s", 40000000);
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", 40000000);
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