The Ralink USB PHY driver merged into mainline has a slightly different
device tree binding than the patch that was used with linux 4.9.
The new driver requires a `ralink,sysctl` node pointing to the `syscon`
node.
This patch also sets `#phy-cells` to 0, as recommended by the mainline
documentation [1].
[1] Documentation/devicetree/bindings/phy/ralink-usb-phy.txt
Signed-off-by: Vianney le Clément de Saint-Marcq <code@quartic.eu>
TP-Link Archer C60 v2 is a dual-band AC1350 router, based on
Qualcomm/Atheros QCA9561 + QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (web):
Download lede-ar71xx-generic-archer-c60-v2-squashfs-factory.bin and use
OEM System Tools - Firmware Upgrade site.
Flash instruction (recovery):
1. Set PC to fixed IP address 192.168.0.66
2. Download lede-ar71xx-generic-archer-c60-v2-squashfs-factory.bin and
rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root
directory
4. Turn off the router
5. Press and hold reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time the firmware should
be transferred from the tftp server
8. Wait ~30 second to complete recovery
Flash instruction (under U-Boot, using UART):
tftp 0x81000000 lede-ar71xx-...-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
reset
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
Add support for TL-WR940N v6 board. It is pretty much the same as v5
except they only left WAN LED and removed other ones.
Installation: flash factory image through WEB UI or use TFTP.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rework (again) platform support for dual-role chipidea USB controller:
- include support for QCA9531
- use correct EHCI block size
- drop ar933x_usb_setup_ctrl_config() function
- simplify code after previous "register chipidea only in device mode"
change (fa22714181)
Reworked patch was tested on devices with below QCA WiSOCs (signal/GPIO
name with required bootstrap state for USB bus 0 in device mode):
- AR9331 (GPIO13 pull-down)
- AR9342 (RGMII_TXD1/ETXD1 pull-up)
- AR9344 (GPIO20 pull-up)
- QCA9531 (GPIO13 pull-up)
- QCA9558 (GPIO13 pull-up)
The only way to select device mode for bus 0 is to change SOC bootstrap
configuration which is sampled only once, at hard reset. Likely, other
models, like QCA9556 or AR9341, should also support dual-role USB mode
but they were not tested.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Supports IPv4 flow offloading on MT7621 for Routing, SNAT and DNAT
Supported are regular ethernet->ethernet connections, including one
802.1q VLAN and/or PPPoE encapsulation
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
of_dma_configure() sets a default ->dma_mask of
DMA_BIT_MASK(32), claiming devices can DMA from
the full 32bit address space.
The mtk-mmc driver does not support access to
highmem pages, so it is really limited to the
bottom 512M (actually 448M due to 64M of IO space).
Setting ->dma_mask to NULL causes mmc_setup_queue()
to fall-back to using BLK_BOUNCE_HIGH to tell the
block layer to use a bounce-buffer for any highmem
pages requiring IO.
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
- avoid using garbage stack values as dst pointer if lookup fails
- provide the source address for ipv6 dst lookup
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Our .dts files only have one device defined and this is unlikely to
change, so statically initialize host->id to 0.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit adds correct model detection for UniFi
AC-Mesh. Previously said device was incorrectly detected
as UniFi AC-Lite.
The Information about the device is stored at 0xC in the EEPROM
partition. It corresponds to the sysid in /etc/board.info of the
Ubiquiti stock firmware.
Signed-off-by: David Bauer <mail@david-bauer.net>
D-Link DAP-1330 rev. A1 is a wall-plug N300 Wi-Fi range extender,
based on Qualcomm/Atheros QCA9533 v2.
Short specification:
- 650/393/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR1)
- 8 MB of FLASH
- 2T2R 2.4 GHz
- 2x external antennas
- 6x LED (2 are bi-color), 2x button
- 4 pin on pcb (looking from eth port and from left to right tx,rx,gnd,vcc)
Flash instruction: use "factory" image directly in vendor GUI.
This device has a recovery system that assign the ip addr of env
variable "serverip" via dhcp to a pc, and the "ipaddr" value to itself.
The recovery it's triggered by a not bootable firmware,
or pressing the reset button during the bootloader startup (first 30 seconds).
The recovery uses a http page to restore the firmware, and it's checking
the firmware image header, so use the "factory" image to
restore or the original firmware.
You can access vendor firmware over serial using:
- login: root
- password: linuxrocks
Image was tested only in EU version of the device, but should work
also with the same device version sold in other countries.
Signed-off-by: Nicolò Veronese <nicveronese@gmail.com>
It was wrong from the beginning and the trigger for the wan led was
never set due to the typo.
Signed-off-by: Reto Schneider <code@reto-schneider.ch>
[add commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
We need to reset the GPHYs on reboot as well. Otherwise the bootloader
might have issues to reset/find the GPHYs.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The DWR-921-C3 Wireless Routers with LTE embedded modem is based on the
MT7620N SoC.
Specification:
* MediaTek MT7620N (580 Mhz)
* 64 MB of RAM
* 16 MB of FLASH
* 802.11bgn radio
* 5x 10/100 Mbps Ethernet (1 WAN and 4 LAN)
* 2x external, detachable (LTE) antennas
* UART header on PCB (57600 8n1)
* 6x LED (GPIO-controlled)
* 1x bi-color Signal Strength LED (GPIO-controlled)
* 2x button
* JBOOT bootloader
Installation:
Apply factory image via d-link http web-gui.
How to revert to OEM firmware:
1.) Push the reset button and turn on the power. Wait until LED start
blinking (~10sec.)
2.) Upload original factory image via JBOOT http (IP: 192.168.123.254)
3.) If http doesn't work, it can be done with curl command:
curl -F FN=@XXXXX.binhttp://192.168.123.254/upg
where XXXXX.bin is name of firmware file.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
The DWR-921-C1 Wireless Routers with LTE embedded modem is based on the
MT7620N SoC.
Specification:
* MediaTek MT7620N (580 Mhz)
* 64 MB of RAM
* 16 MB of FLASH
* 802.11bgn radio
* 5x 10/100 Mbps Ethernet (1 WAN and 4 LAN)
* 2x external, detachable (LTE) antennas
* UART header on PCB (57600 8n1)
* 6x LED (GPIO-controlled)
* 1x bi-color Signal Strength LED (GPIO-controlled)
* 2x button
* JBOOT bootloader
The status led has been assigned to the dwr-921-c1:green:sigstrength (lte
signal strength) led. At the end of the boot it is switched off and is
available for lte operation. Work correctly also during sysupgrade
operation.
Installation:
Apply factory image via d-link http web-gui.
How to revert to OEM firmware:
1.) Push the reset button and turn on the power. Wait until LED start
blinking (~10sec.)
2.) Upload original factory image via JBOOT http (IP: 192.168.123.254)
3.) If http doesn't work, it can be done with curl command:
curl -F FN=@XXXXX.binhttp://192.168.123.254/upg
where XXXXX.bin is name of firmware file.
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
Backport patch which adds suport for the BroadMobi BM806U 3G/4G modem,
which is used in D-Link DWR-921 C3.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Backport patch which adds suport for the Wistron NeWeb d18q1 LTE modem
which is used in D-Link DWR-921 C1.
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
drivers/mmc/host/mtk-mmc/dbg.c:51:13: warning: 'cmd_buf' defined but not used [-Wunused-variable]
static char cmd_buf[256];
^~~~~~~
In addition, msdc_reg[] is completely unused, even in debug
mode.
Signed-off-by: André Draszik <git@andred.net>
msdc_6575_host[] is unused, just remove it. Also, it
was the source of memory corruption up until the
previous fix to this driver.
Signed-off-by: André Draszik <git@andred.net>
pdev->id is -1 when only one device exists, and is used:
* as an index into drv_mode[] to determine whether to use
PIO or DMA mode (via host->id)
* as an index into msdc_6575_host[], to store the
mmc_priv() data.
Obviously, -1 is not a valid index in either case, causing
us to read invalid memory, and memory corruption,
respectively.
The invalid memory read is causing non-deterministic
behaviour, in particular in the v4.4 kernel it still
picked DMA mode, but in the v4.9 it now always picks
PIO mode.
Also, PIO mode doesn't work, causing the following:
/ # echo 3 > /proc/sys/vm/drop_caches
[ 3845.249237] sh (128): drop_caches: 3
/ # /root/usr/lib/libc.so
[ 3846.096070] do_page_fault(): sending SIGSEGV to libc.so for invalid read access from 7f9cb5a0
[ 3846.104758] epc = 779b0ea4 in libc.so[7792f000+c3000]
[ 3846.109907] ra = 779a8004 in libc.so[7792f000+c3000]
Segmentation fault
/ # /root/usr/lib/libc.so
musl libc (mipsel-sf)
Version 1.1.16-git-40-g54807d47
Dynamic Program Loader
Usage: /root/usr/lib/libc.so [options] [--] pathname [args]
(i.e. initial page-in of any binary causes a segfault,
subsequent access works.)
While this change doesn't fix PIO mode, it at least makes
us deterministically use DMA (which works), and it also
stops us from corrupting memory.
Signed-off-by: André Draszik <git@andred.net>
drivers/mmc/host/mtk-mmc/sd.c:2782:5: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
if ((hw->flags & MSDC_SDIO_IRQ) || (hw->flags & MSDC_EXT_SDIO_IRQ))
^~
drivers/mmc/host/mtk-mmc/sd.c:2785:2: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the 'if'
cd_active_low = !of_property_read_bool(pdev->dev.of_node, "mediatek,cd-high");
^~~~~~~~~~~~~
Signed-off-by: André Draszik <git@andred.net>
Add initial support for Marvell MACCHIATObin, cortex-a72 based Marvell
ARMADA 8040 Community board. Comes in two forms: Single Shot and Double
Shot.
Specifications:
- Quad core Cortex-A72 (up to 2GHz)
- DDR4 DIMM slot with optional ECC and single/dual chip select support
- Dual 10GbE (1/2.5/10GbE) via copper or SFP
2.5GbE (1/2.5GbE) via SFP
1GbE via copper
- SPI Flash
- 3 X SATA 3.0 connectors
- MicroSD connector
- eMMC
- PCI x4 3.0 slot
- USB 2.0 Headers (Internal)
- USB 3.0 connector
- Console port (UART) over microUSB connector
- 20-pin Connector for CPU JTAG debugger
- 2 X UART Headers
- 12V input via DC Jack
- ATX type power connector
- Form Factor: Mini-ITX (170 mm x 170 mm)
More details at http://macchiatobin.net
Booting from micro SD card:
1. reset U-Boot environment:
env default -a
saveenv
2. prepare U-Boot with boot script:
setenv bootcmd "load mmc 1:1 0x4d00000 boot.scr; source 0x4d00000"
saveenv
or manually:
setenv fdt_name armada-8040-mcbin.dtb
setenv image_name Image
setenv bootcmd 'mmc dev 1; ext4load mmc 1:1 $kernel_addr $image_name;ext4load mmc 1:1 $fdt_addr $fdt_name;setenv bootargs $console root=/dev/mmcblk1p2 rw rootwait; booti $kernel_addr - $fdt_addr'
saveenv
Signed-off-by: Damir Samardzic <damir.samardzic@sartura.hr>
The DTB for Clearfog Pro has been renamed in mainline. However U-Boot
hasn't picked up that change yet :(, so we need to hardcode it for now.
Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
Newer Linksys boards might come with a Winbond W29N02GV which can be
configured in different ways. Make sure we configure it the same way as
the older chips so everything keeps working.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
CONFIG_NVMEM_BCM_OCOTP was added in kernel 4.10 and it is possible to
activate it on the bcm53xx target. Deactivate it by default to fix the
build of the bcm53xx target.
This was found by build bot.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch cleans and reworks the WNDR4700 dts to increase the
now combined dtb+kernel partition to 3.5 MiB. This has become
necessary due to the switch to GCC 7.3 and the ever increasing
kernel binary size.
The dtb+kernel partition was combined in order to finally
fix the problem with out-of-sync device-trees. From now
on, the kernel and device-tree will always be updated together.
Upgrade Note:
Existing installations will have to use the TFTP firmware
recovery option in order to install the update. Affected users
are advised to make a backup of their existing configuration
prior to running sysupgrade:
<https://openwrt.org/docs/guide-user/installation/generic.backup#backup_openwrt_configuration>
Due to the repartitioning of the NAND, the generated backup
should be placed on either the internal HDD, an attached
USB-Stick or on another PC (externally).
To manually trigger the firmware recovery, the reset button has
to be pressed (and hold) during boot. U-boot will enter the "Upgrade
Mode" and starts a tftpserver listening on 192.168.1.1 for a
tftp client from one of the four LAN/Ethernet ports to connect and
upload the new system: (enable tftp binary mode!).
openwrt-apm821xx-nand-netgear_wndr4700-squashfs-factory.img
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
The recent change to switch to gcc 7.3 broke the image
generation code, as the kernel would no longer fit into
KERNEL_SIZE.
This patch fixes the issue by reworking the initramfs
creation and packaging, which will get rid of the
KERNEL_SIZE check in the process.
This new initramfs can be loaded through the MR24 U-boot
in the following way:
=> setenv ipaddr 192.168.1.1
=> setenv bootargs console=ttyS0,$baudrate
=> tftpboot c00000 192.168.1.2:meraki_mr24-initramfs-kernel.bin
[...]
Load address: 0xc00000
Loading: ################################################ [...]
done
Bytes transferred = 5952544 (5ad420 hex)
=> bootm $fileaddr
\## Booting kernel from Legacy Image at 00c00000 ...
...
For more information and the latest flashing guide:
please visit the OpenWrt Wiki Page for the MR24:
<https://openwrt.org/toh/meraki/mr24#flashing>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>