- use ether_foo() routines to work with addresses
- use ETH_ALEN inplace of magic '6'
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42494
Use mutex inplace of spinlock to make code simple, also call
mutex_{lock,unlock} explicitly to avoid sparse warning about context
imbalance.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42491
Remove FSF mailing address as suggested by checkpach and place license
URL.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42487
Missing this headers cause several sparse "symbol 'foo' was not
declared. Should it be static?" warnings.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42483
This switches to kernel 3.10 that was prepared by Hauke in r41531 :
gemini: add support for kernel 3.10
This is compile tested only, please run test and report back.
I've simply checked if it still compiles, unfortunately we didn't get
any feedback for this target.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42450
the old dwc_otg driver is starting to fall apart and fails on newer 3g
modems and some storage devices. switch to the upstream dwc2 driver which
is no longer in staging/.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42446
While the AR9331 has a gigabit MAC towards the internal switch, the
integrated PHYs however are only 100-base-tx capable. The existing code
however advertieses gigabit capability in the link status word. If you
attach such a PHY to a gigabit capable switch on the remote end, with
some probability it attempts to negotiate gigabit and fails, falling
baco to the AR9331 assuming a 10mbit half-duplex link. This has been
observed quite frequently with the Carambola2 and gigabit capable
switches.
In ath79_register_eth(), "pdata->has_gbit = 1;" is set unconditionally
for both AR9331 ethernet ports. This is most likely wrong. Despite the
two MAC IP cores being gigabit MACs, the MAC for eth1 is connected to a
100base-T PHY via MII. The has_gbit attribute is used in the ethernet
driver to determine the supported link modes.
So either pdata->has_gbit is not set to 1 anymore, or the ethernet
driver needs to be modified to determine the advertised link code word
on another criteria than pdata->has_gbit. This patch implements the
former solution.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
SVN-Revision: 42432
Some Kconfig options are only relevant for the legacy platforms, move
them where they belong
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42416
We need a new kernel version to support Cortex-A5 based platforms such
as SAMA5GD3.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42415
In preparation for adding 3.14 kernel support, move files and patches to
a separate per-version directory since some of them will have
incompatible changes (e.g: dts)
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42413
In preparation for adding SAMA5D3 support, move the legacy ARMv5 based
platforms to a separate subtarget.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42408
The cns3xxx uses irq61 for pcie0_intr which in the case of a PCIe-to-PCI
bridge ends up combining INTA/B/C/D on a single ARM CPU interrupt. This is
not optimal when you have multiple cores. To overcome this limitation an
enhancement was made on newer Laguna PCB's that support miniPCI cards
to route the INTA/B/C/D signals to unique external ARM CPU interrupts which
can help balance CPU core utilization and in some cases increase overall
system performance or responsiveness.
For more details see:
http://trac.gateworks.com/wiki/multicoreprocessing#PCIInterruptsteering
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42400
