Missing this headers cause several sparse "symbol 'foo' was not
declared. Should it be static?" warnings.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42483
Created on basis of 3.10 config. Remove few obsolete symbols and add new
upstream symbols. New symbols left in its default state.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41996
Use AR2315_ prefix for macroses specific to AR2315/AR2316/AR2317 chips,
use AR5312_ prefix for macroses specific to AR5312/AR2312/AR2313 chips,
and use AR231X_ prefix for common macroses.
This patch should not cause any functional changes, only make clear
which macros is common and which macros is specific.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41701
Pass only physical address to 8250 serial port driver and set flag to
remap I/O memory inside the driver. Also fix AR5312 UART base address
definition, which seems specified already mapped.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41700
Pass PHY I/O memory region via platform resources and remap them
unconditionally.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41698
Each SoCs generation has own independent gpiolib realization, so we
have no reason to keep these realizations in semiuniversal form.
Following modifications are made:
* Remove valid_mask field
* Remove ar231x_gpio_chip structure
* Rename AR2315_GPIO_CR to AR2315_GPIO_DIR
* Fix count of AR5312 GPIOs
* Simplify gpio_chip methods realization
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41696
Currently AR5312 misc IRQ numbers are used for AR2315+ chips, what cause
us to use switch-case to map IRQ number to ISR bit. Introduce AR2315
specific misc IRQs set and simplify interrupt (un)mask operation.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41694
Rename interrupt control handlers to be consistent with operation names
and add IRQ chips names.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41693
UART IRQ number could be different for different SoCs, so make them
configurable.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41691
* Pass iomem and IRQ via platform device resources
* Remap iomem and use iowrite32 accessor function
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41688
Rename config symbol to AR2315_WDT to avoid confusion with other Atheros
SoCs.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41685
205-fix-headers_install.patch is obseleted by upstream commit 3246a0352e3d58380b9386570f1db1faf7edf8a8
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 41351
We do not need global access to it, so move it from arch include to the
mtd subdir.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41321
Pass I/O memory regions (flash read and MMR) via platform device
resources array and use them inside spiflash driver.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41320
Moving the start of IO mem to 0x10000000 leads to allocation conflict
with SPI flash memory region, which starts at 0x08000000.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41319
We should not detect actual flash size during board initialization to
find board config at the end of the flash, just use large enough mapping
size (currently 128 mbit). If mapping size is larger than the actual
flash size, than flash will simply be mapped multiple times. This change
simplifies code by removing duplication and saves about 200 bytes of
uncompressed kernel :)
Tested with Ubnt LS2 board equipped with STM 25p32v6p NOR flash (32 mbit).
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41317
Merge 3_10-updates.patch into the ar2313_ethernet.patch since it contains
only one ethernet driver fix.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41316
Use msleep(20) instead of msleep(10) to make code closer to reality
since msleep can sleep for up to 20ms even we request shorter delay.
All updated calls are located in PCI initialization routine which is
called only once upon device boot. So there should be no performance
issues caused by more longer delay.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41096
Use __func__ instead of gcc specific __FUNCTION__ as suggested by
checkpatch.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41093
Move trailing statements to next line with indentation as suggested by
checkpatch.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 41092
