This adds basic support for TP-Link VR200v.
Currently the following parts are not working: FXO, Voice, DECT, WIFI (both)
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48328
Most of currently mentioned CFLAGS in arc770/Makefile
are not really required because:
[1] "-Os -pipe" are set by default in include/target.mk
[2] "-fno-caller-saves" gets enabled via menuconfig
as an extra compiler flag for developers
So the only one that makes sense is "-matomic" and
that one is really essential. Without it many software
packges won't build complainin on unresolved atomic ops.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48326
While bumping kernel version kernel command line was
unintentionally modified in attempt to make it closer
to upstream version.
In case of AXS that has not only serial port but HDMI/USB
both capable of being debug console we have 2 entries in
kernel's command line:
------------------->8-----------------
console=tty0 console=ttyS3,115200n8
------------------->8-----------------
But as it turned out OpenWRT uses procd as init instead of
Busybox. And in its turn procd gets the first "console"
entry from kernel command line (/proc/cmdline) and uses it
if default inittab is used:
------------------->8-----------------
...
::askconsole:/bin/ash --login
------------------->8-----------------
So what we got is non-functional serial console.
That change removes "console=tty0" which brings serial
console back to life.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48325
The following patches were dropped because they are already applied
upstream:
- 0038-MIPS-lantiq-fpi-on-ar9.patch
- 0039-MIPS-lantiq-initialize-usb-on-boot.patch
- 0042-USB-DWC2-big-endian-support.patch
- 0043-gpio-stp-xway-fix-phy-mask.patch
All other patches were simply refreshed, except the following:
- 0001-MIPS-lantiq-add-pcie-driver.patch
Changes to arch/mips/lantiq/xway/sysctrl.c (these changes disabled
some PMU gates for the vrx200 / VR9 SoCs) were removed since the
upstream kernel disables unused PMU gates automatically (since
95135bfa7ead1becc2879230f72583dde2b71a0c
"MIPS: Lantiq: Deactivate most of the devices by default").
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
Since OpenWrt commit 55ba20afcc2fe785146316e5be2c2473cb329885 drivers
should use of_get_mac_address(). of_get_mac_address_mtd is not
available for drivers anymore since it's called automatically within
of_get_mac_address().
- 0028-NET-lantiq-various-etop-fixes.patch
Same changes as in 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
While refreshing the kernel configuration SPI support had to be moved to
config-4.4 because otherwise M25P80 was disabled.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48307
AP148 uses lowercase name as boardname, so we need to use this in
platform.sh as well.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48304
Overwriting static strings is never a good idea, especially expecting
identical strings to be stored in different memory locations.
This caused the lookups to always return the second chip's name. Fix
this by just initializing the lookup with the right values, so we
don't need to modify the strings at all.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48303
BCM531x5 has two pontential cpu ports, and header mode can be enabled
independently on both.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48302
Re-defining the compatible property is not required since the correct
value is inherited from vr9.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48295
Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
new SPI driver to configure the SPI pins.
While here we are also using separate input and output settings so we
are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
the old one did). Thus we have to adjust the devices accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48293
The new driver provides a few improvements over the old one:
- Separate compatible strings per SoC type (this allows removing some
hardcoded of_device_is_compatible() checks)
- It does not rely upon spi-bitbang anymore
- chip-selects are numbered as in the datasheet (= starting at 1 instead
of 0)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48292
All devices are now using the HW SPI driver, so this is not necessary
anymore.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48291
This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48286
After the latest pinctrl backports there are only 50 (instead of 56 as
before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now
462, before it was 456). This means that any hardcoded GPIOs have to be
adjusted.
This broke the PCIe driver (which seems to be the only driver which uses
hardcoded GPIO numbers), it only reports:
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
pcie_rc_initialize link up failed!!!!!
To prevent more of these issues in the future we remove the hardcoded
PCIe reset GPIO definition and simply pass it via device-tree (like the
PCI driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48285
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
Upstream commit be14811c03cf2 "pinctrl/lantiq: introduce new dedicated
devicetree bindings" allows us to use each pin in the pinmux. This is
useful for example in the "spi" group which contains some pins which
are inputs, and some which are outputs.
These can only be used once the new compatible strings for the pinctrl
node are used.
Additionally 0150-lantiq-pinctrl-xway.patch and the "GPIO PORT3 fix"
(which was part of 0012-pinctrl-lantiq-fix-up-pinmux.patch) were
replaced with their upstream variants which are also in 4.5.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48283
According to the calling convention of the o32 ABI the caller
function must reserve stack space for $a0-$a3 registers in case
the callee needs to save its arguments.
The assembly code of the loader does not reserve stack space for
these registers thus when the 'loader_main' function needs to save
its arguments, those will be stored in the 'workspace' area instead
of the stack.
Because the workspace area is also used by other part of the code, the
saved register values gets overwritten and this often leads to failed
kernel boots.
Fix the code to reserve stack space for the registers to avoid this
error.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 48279
Change MTD on WNDR4300 and WNDR3700v4 to fully utilize the 128MB flash.
Credit to @Tuochenlyu on GitHub.
Signed-off-by: Chris Marchesi <chrism@vancluevertech.com>
SVN-Revision: 48276
PTP requires at least one timer to be 1PPS so describe it.
For testing, load kernel module gianfar_ptp and use ptp4l
from linuxptp.
Copied from FSL P1010RDB reference design.
Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@neratec.com>
SVN-Revision: 48275
