lantiq: Switch to the new SPI driver
Compared to the "old" driver: - Each device must assign a pinctrl setting to the SPI node to allow the new SPI driver to configure the SPI pins. While here we are also using separate input and output settings so we are independent of whether the bootloader configures the pins correctly. - We use the new "compatible" strings to make the driver choose the correct number of chip-selects for each SoC. - The new driver starts counting the chip-selects at 1 (instead of 0, like the old one did). Thus we have to adjust the devices accordingly. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48293
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5985c56ec6
commit
04ad02d132
10 changed files with 94 additions and 35 deletions
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@ -28,10 +28,6 @@
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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spi {
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lantiq,groups = "spi", "spi_cs1";
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lantiq,function = "spi";
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};
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asc {
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lantiq,groups = "asc";
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lantiq,function = "asc";
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@ -42,6 +38,18 @@
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lantiq,open-drain = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs1";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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etop@E180000 {
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@ -50,11 +58,14 @@
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};
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spi@E100800 {
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m25p80@0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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m25p80@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0 0>;
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reg = <1 0>;
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spi-max-frequency = <5000000>;
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partition@0 {
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@ -45,10 +45,18 @@
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lantiq,output = <1>;
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lantiq,pull = <0>;
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};
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spi {
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lantiq,groups = "spi", "spi_cs4";
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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@ -150,13 +158,16 @@
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};
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&spi {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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status = "ok";
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m25p80@3 {
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <3 0>;
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reg = <4 0>;
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spi-max-frequency = <1000000>;
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partition@0 {
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@ -53,10 +53,6 @@
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lantiq,groups = "stp";
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lantiq,function = "stp";
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};
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spi {
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lantiq,groups = "spi", "spi_cs4";
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lantiq,function = "spi";
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};
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nand {
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lantiq,groups = "nand cle", "nand ale",
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"nand rd", "nand rdy";
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@ -90,6 +86,18 @@
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lantiq,pull = <2>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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eth@E108000 {
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@ -297,13 +305,16 @@
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};
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&spi {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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status = "ok";
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m25p80@3 {
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <3 0>;
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reg = <4 0>;
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spi-max-frequency = <1000000>;
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partition@0 {
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@ -66,10 +66,6 @@
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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spi {
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lantiq,groups = "spi", "spi_cs4";
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lantiq,function = "spi";
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};
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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@ -92,6 +88,18 @@
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lantiq,output = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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eth@E108000 {
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@ -239,13 +247,16 @@
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};
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&spi {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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status = "ok";
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m25p80@3 {
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <3 0>;
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reg = <4 0>;
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spi-max-frequency = <1000000>;
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ath9k_cal: partition@0 {
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@ -43,16 +43,24 @@
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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spi {
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lantiq,groups = "spi", "spi_cs4";
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lantiq,function = "spi";
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};
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pcie-rst {
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lantiq,pins = "io38";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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eth@E108000 {
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@ -211,13 +219,16 @@
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};
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&spi {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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status = "ok";
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m25p80@3 {
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <3 0>;
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reg = <4 0>;
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spi-max-frequency = <33250000>;
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m25p,fast-read;
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@ -73,10 +73,12 @@
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reg = <0x10000000 0xEF00000>;
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spi@E100800 {
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compatible = "lantiq,spi-xway";
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compatible = "lantiq,ase-spi";
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reg = <0xE100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <24 25 26>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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@ -101,10 +101,12 @@
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};
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spi: spi@E100800 {
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compatible = "lantiq,spi-xway";
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compatible = "lantiq,xrx100-spi";
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reg = <0xE100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <22 23 24>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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spi: spi@E100800 {
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compatible = "lantiq,spi-xway";
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compatible = "lantiq,xrx200-spi";
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reg = <0xE100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <22 23 24>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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@ -56,9 +56,8 @@ CONFIG_RTL8366S_PHY=y
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CONFIG_RTL8367B_PHY=y
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CONFIG_RTL8367_PHY=y
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CONFIG_SPI=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_LANTIQ=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPI_XWAY=y
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CONFIG_SYS_SUPPORTS_MIPS16=y
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CONFIG_UBIFS_FS=y
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CONFIG_UBIFS_FS_ADVANCED_COMPR=y
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CONFIG_RTL8367B_PHY=y
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CONFIG_RTL8367_PHY=y
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CONFIG_SPI=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_LANTIQ=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPI_XWAY=y
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CONFIG_SYS_SUPPORTS_MIPS16=y
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CONFIG_UBIFS_FS=y
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CONFIG_UBIFS_FS_ADVANCED_COMPR=y
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