The OpenMesh MR600(v1) can only enable the 2.4G WiFi PHY LED through the
mini-PCIe device. Not configuring the LED pin inside the platform data
makes it impossible to configure it through any standard OpenWrt tool.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 42184
- use full board name
- rename uboot-env partition
- add dsl_fw partition
- remove unneeded pinmux groups
- move gigabit ethernet to LAN
- load mac address from mtd
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 42180
Due to TCP connections not working when VLAN is disabled, this is
needed to get failsafe functional.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 42179
According to the pcb tracing results[1] by anton.rad[2] MPR-A1s expose
6 unused GPIOs, only one of them working as configured in the current
DTS. This patch enables GPIO22-26.
Tested on hardware.
[1] http://i.imgur.com/kHVW2Ox.jpg
[2] https://forum.openwrt.org/viewtopic.php?pid=222698#p222698
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 42178
The conversion was not 100% correct and leads to u-boot failing to
verify the CRC, revert that change for now.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42170
This patch is causing more harm than good on most AR7 routers out there,
better have no manageable switch rather than no ethernet connection, at
least for now.
Fixes#16523, #5927
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 42168
The GW5520 is a small form-factor single-board computer with the following
features:
* 70x100mm form-factor
* IMX6DL 800MHz SoC (IMX6Q optional)
* 512MB 32bit DDR3 SDRAM (up to 2GB optional)
* 256MB NAND FLASH (up to 2GB optional)
* Gateworks System Controller
* 2x front-panel Intel i210 GbE adapters with passive PoE support
* 2x MiniPCIe sockets with USB support
* 2x front-panel USB
* 1x rear-panel full-size HDMI connector
* 1x front-panel bi-color user LED
* 1x front-panel user pushbutton
* 1x rear-panel barrel jack for power
* 1x Application connector with:
* 2x TTL level UARTs
* 10x TTL level Digital IO
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42148
The GW16083 Ethernet Expansion Mezzanine adds the following to supported
Gateworks baseboards:
* 7-port Ethernet Switch
* 4x RJ45 ports (ENET1-4) supporing 802.11af/at PoE (with optional PoE module)
* 2x RJ45 ports or SFP module (ENET5-6) (auto-selected)
This series adds support for a phy driver that adds support for ENET5/ENET6
PHY adding initialization for those PHY's and a polling mechanism that detects
SFP insertion and configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42147
The GW16082 miniPCI Expansion Mezzanine has the INTA/B/C/D IRQ's reversed
from the PCI standard. This will soon be resolved in the bootloader via
devicetree, but in the meantime this will work around the issue.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42146
Now that we migrated all users to dtb based detection, we can drop the
board fixup code.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42129
This requires individual images for each board version for now.
Linux partition was shrunk to ensure writing thewrong image won't
erase wifi calibration data.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42126
Add the required nodes to the dtsi files and code to prevent double
registration from the board support code.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42123
In preparation for switching to dtb based board identification, add
support for building lzma-loader and lzma cfe kernels with dtb
appended.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42121
Allow appending a dtb blob to the binary and use it for identifying the
board. Fall back to nvram based identification in case of no dtb passed.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42119
