2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_AHCI_MVEBU=y
|
|
|
|
|
CONFIG_ALIGNMENT_TRAP=y
|
|
|
|
|
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
|
|
|
|
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
|
|
|
|
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
|
|
|
|
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
|
|
|
|
CONFIG_ARCH_HAS_SET_MEMORY=y
|
|
|
|
|
CONFIG_ARCH_HAS_SG_CHAIN=y
|
|
|
|
|
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
|
|
|
|
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
|
|
|
|
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
|
|
|
|
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
|
|
|
|
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
|
|
|
|
CONFIG_ARCH_MULTIPLATFORM=y
|
|
|
|
|
# CONFIG_ARCH_MULTI_CPU_AUTO is not set
|
|
|
|
|
CONFIG_ARCH_MULTI_V6_V7=y
|
|
|
|
|
CONFIG_ARCH_MULTI_V7=y
|
|
|
|
|
CONFIG_ARCH_MVEBU=y
|
|
|
|
|
CONFIG_ARCH_NR_GPIO=0
|
|
|
|
|
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
|
|
|
|
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
|
|
|
|
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
|
|
|
|
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
|
|
|
|
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
|
|
|
|
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
|
|
|
|
|
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
|
|
|
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
|
|
|
|
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
|
|
|
|
# CONFIG_ARCH_WANTS_THP_SWAP is not set
|
|
|
|
|
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
|
|
|
|
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
|
|
|
|
CONFIG_ARM=y
|
|
|
|
|
CONFIG_ARMADA_370_CLK=y
|
|
|
|
|
CONFIG_ARMADA_370_XP_IRQ=y
|
|
|
|
|
CONFIG_ARMADA_370_XP_TIMER=y
|
|
|
|
|
CONFIG_ARMADA_38X_CLK=y
|
|
|
|
|
CONFIG_ARMADA_THERMAL=y
|
|
|
|
|
CONFIG_ARMADA_XP_CLK=y
|
|
|
|
|
CONFIG_ARM_APPENDED_DTB=y
|
mvebu: new subtarget cortex A53
This commit introduces new subtarget for Marvell EBU Armada Cortex A53
processor based devices.
The first device is Globalscale ESPRESSObin. Some hardware specs:
SoC: Marvell Armada 3700LP (88F3720) dual core ARM Cortex A53
processor up to 1.2GHz
RAM: 512MB, 1GB or 2GB DDR3
Storage: SATA interface
µSD card slot with footprint for an optional 4GB EMMC
4MB SPI NOR flash for bootloader
Ethernet: Topaz Networking Switch (88E6341) with 3x GbE ports
Connectors: USB 3.0
USB 2.0
µUSB port connected to PL2303SA (USB to serial bridge
controller) for UART access
Expansion: 2x 46-pin GPIO headers for accessories and shields with
I2C, GPIOs, PWM, UART, SPI, MMC, etc
MiniPCIe slot
Misc: Reset button, JTAG interface
Currently booting only from µSD card is supported.
The boards depending on date of dispatch can come with various U-Boot
versions. For the newest version 2017.03-armada-17.10 no manual
intervention should be needed to boot OpenWrt image. For the older ones
it's necessary to modify default U-Boot environment:
1. Interrupt boot process to run U-Boot command line,
2. Run following commands:
(for version 2017.03-armada-17.06 and 2017.03-armada-17.08)
setenv bootcmd "load mmc 0:1 0x4d00000 boot.scr; source 0x4d00000"
saveenv
(for version 2015.01-armada-17.02 and 2015.01-armada-17.04)
setenv bootargs "console=ttyMV0,115200 root=/dev/mmcblk0p2 rw rootwait"
setenv bootcmd "ext4load mmc 0:1 ${fdt_addr} armada-3720-espressobin.dtb; ext4load mmc 0:1 ${kernel_addr} Image; booti ${kernel_addr} - ${fdt_addr}"
saveenv
3. Poweroff, insert SD card with OpenWrt image, boot and enjoy.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2018-03-07 21:10:02 +00:00
|
|
|
# CONFIG_ARM_ARMADA_37XX_CPUFREQ is not set
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
|
|
|
|
# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
|
|
|
|
|
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
|
|
|
|
|
CONFIG_ARM_CPU_SUSPEND=y
|
|
|
|
|
CONFIG_ARM_CRYPTO=y
|
|
|
|
|
CONFIG_ARM_ERRATA_720789=y
|
2018-02-18 17:57:02 +00:00
|
|
|
CONFIG_ARM_ERRATA_764369=y
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_ARM_GIC=y
|
|
|
|
|
CONFIG_ARM_GLOBAL_TIMER=y
|
|
|
|
|
CONFIG_ARM_HAS_SG_CHAIN=y
|
|
|
|
|
CONFIG_ARM_HEAVY_MB=y
|
|
|
|
|
CONFIG_ARM_L1_CACHE_SHIFT=6
|
|
|
|
|
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
|
|
|
|
# CONFIG_ARM_LPAE is not set
|
|
|
|
|
CONFIG_ARM_MVEBU_V7_CPUIDLE=y
|
|
|
|
|
CONFIG_ARM_PATCH_IDIV=y
|
|
|
|
|
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
|
|
|
|
CONFIG_ARM_THUMB=y
|
|
|
|
|
# CONFIG_ARM_THUMBEE is not set
|
|
|
|
|
CONFIG_ARM_UNWIND=y
|
|
|
|
|
CONFIG_ARM_VIRT_EXT=y
|
|
|
|
|
CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
|
|
|
|
|
CONFIG_ATA=y
|
|
|
|
|
CONFIG_ATAGS=y
|
|
|
|
|
CONFIG_AUTO_ZRELADDR=y
|
|
|
|
|
CONFIG_BLK_DEV_LOOP=y
|
|
|
|
|
CONFIG_BLK_DEV_SD=y
|
|
|
|
|
CONFIG_BLK_MQ_PCI=y
|
|
|
|
|
CONFIG_BLK_SCSI_REQUEST=y
|
|
|
|
|
CONFIG_BOUNCE=y
|
|
|
|
|
# CONFIG_CACHE_FEROCEON_L2 is not set
|
|
|
|
|
CONFIG_CACHE_L2X0=y
|
|
|
|
|
CONFIG_CLKDEV_LOOKUP=y
|
|
|
|
|
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
|
|
|
|
|
CONFIG_CLKSRC_MMIO=y
|
|
|
|
|
CONFIG_CLONE_BACKWARDS=y
|
|
|
|
|
CONFIG_COMMON_CLK=y
|
|
|
|
|
CONFIG_CPUFREQ_DT=y
|
|
|
|
|
CONFIG_CPUFREQ_DT_PLATDEV=y
|
|
|
|
|
CONFIG_CPU_32v6K=y
|
|
|
|
|
CONFIG_CPU_32v7=y
|
|
|
|
|
CONFIG_CPU_ABRT_EV7=y
|
|
|
|
|
# CONFIG_CPU_BIG_ENDIAN is not set
|
|
|
|
|
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
|
|
|
|
CONFIG_CPU_CACHE_V7=y
|
|
|
|
|
CONFIG_CPU_CACHE_VIPT=y
|
|
|
|
|
CONFIG_CPU_COPY_V6=y
|
|
|
|
|
CONFIG_CPU_CP15=y
|
|
|
|
|
CONFIG_CPU_CP15_MMU=y
|
|
|
|
|
CONFIG_CPU_FREQ=y
|
|
|
|
|
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
|
|
|
|
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
|
|
|
|
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
|
|
|
|
CONFIG_CPU_FREQ_GOV_COMMON=y
|
|
|
|
|
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
|
|
|
|
|
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
|
|
|
|
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
|
|
|
|
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
|
|
|
|
|
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
|
|
|
|
CONFIG_CPU_FREQ_STAT=y
|
|
|
|
|
CONFIG_CPU_HAS_ASID=y
|
|
|
|
|
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
|
|
|
|
# CONFIG_CPU_ICACHE_DISABLE is not set
|
|
|
|
|
CONFIG_CPU_IDLE=y
|
|
|
|
|
CONFIG_CPU_IDLE_GOV_LADDER=y
|
|
|
|
|
CONFIG_CPU_PABRT_V7=y
|
|
|
|
|
CONFIG_CPU_PJ4B=y
|
|
|
|
|
CONFIG_CPU_PM=y
|
|
|
|
|
CONFIG_CPU_RMAP=y
|
|
|
|
|
CONFIG_CPU_THERMAL=y
|
|
|
|
|
CONFIG_CPU_THUMB_CAPABLE=y
|
|
|
|
|
CONFIG_CPU_TLB_V7=y
|
|
|
|
|
CONFIG_CPU_V7=y
|
|
|
|
|
CONFIG_CRC16=y
|
|
|
|
|
CONFIG_CRYPTO_ACOMP2=y
|
|
|
|
|
CONFIG_CRYPTO_AEAD=y
|
|
|
|
|
CONFIG_CRYPTO_AEAD2=y
|
|
|
|
|
CONFIG_CRYPTO_AES_ARM=y
|
|
|
|
|
CONFIG_CRYPTO_AES_ARM_BS=y
|
|
|
|
|
# CONFIG_CRYPTO_AES_ARM_CE is not set
|
|
|
|
|
# CONFIG_CRYPTO_CHACHA20_NEON is not set
|
|
|
|
|
CONFIG_CRYPTO_CRC32=y
|
|
|
|
|
CONFIG_CRYPTO_CRC32C=y
|
|
|
|
|
# CONFIG_CRYPTO_CRC32_ARM_CE is not set
|
|
|
|
|
CONFIG_CRYPTO_CRYPTD=y
|
|
|
|
|
CONFIG_CRYPTO_DEFLATE=y
|
|
|
|
|
CONFIG_CRYPTO_DES=y
|
|
|
|
|
CONFIG_CRYPTO_DEV_MARVELL_CESA=y
|
|
|
|
|
# CONFIG_CRYPTO_GHASH_ARM_CE is not set
|
|
|
|
|
CONFIG_CRYPTO_HASH=y
|
|
|
|
|
CONFIG_CRYPTO_HASH2=y
|
|
|
|
|
CONFIG_CRYPTO_HW=y
|
|
|
|
|
CONFIG_CRYPTO_LZO=y
|
|
|
|
|
CONFIG_CRYPTO_MANAGER=y
|
|
|
|
|
CONFIG_CRYPTO_MANAGER2=y
|
|
|
|
|
CONFIG_CRYPTO_NULL2=y
|
|
|
|
|
CONFIG_CRYPTO_RNG2=y
|
|
|
|
|
CONFIG_CRYPTO_SHA1=y
|
|
|
|
|
CONFIG_CRYPTO_SHA1_ARM=y
|
|
|
|
|
# CONFIG_CRYPTO_SHA1_ARM_CE is not set
|
|
|
|
|
CONFIG_CRYPTO_SHA1_ARM_NEON=y
|
|
|
|
|
CONFIG_CRYPTO_SHA256_ARM=y
|
|
|
|
|
# CONFIG_CRYPTO_SHA2_ARM_CE is not set
|
|
|
|
|
CONFIG_CRYPTO_SHA512_ARM=y
|
|
|
|
|
CONFIG_CRYPTO_SIMD=y
|
|
|
|
|
CONFIG_CRYPTO_WORKQUEUE=y
|
|
|
|
|
CONFIG_DCACHE_WORD_ACCESS=y
|
|
|
|
|
CONFIG_DEBUG_ALIGN_RODATA=y
|
|
|
|
|
CONFIG_DEBUG_INFO=y
|
|
|
|
|
CONFIG_DEBUG_LL=y
|
|
|
|
|
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
|
|
|
|
|
CONFIG_DEBUG_MVEBU_UART0=y
|
|
|
|
|
# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set
|
|
|
|
|
# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
|
|
|
|
|
CONFIG_DEBUG_UART_8250=y
|
|
|
|
|
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
|
|
|
|
|
CONFIG_DEBUG_UART_8250_SHIFT=2
|
|
|
|
|
# CONFIG_DEBUG_UART_8250_WORD is not set
|
|
|
|
|
CONFIG_DEBUG_UART_PHYS=0xd0012000
|
|
|
|
|
CONFIG_DEBUG_UART_VIRT=0xfec12000
|
|
|
|
|
CONFIG_DEBUG_UNCOMPRESS=y
|
|
|
|
|
CONFIG_DEBUG_USER=y
|
|
|
|
|
CONFIG_DMADEVICES=y
|
|
|
|
|
CONFIG_DMA_ENGINE=y
|
|
|
|
|
CONFIG_DMA_ENGINE_RAID=y
|
|
|
|
|
# CONFIG_DMA_NOOP_OPS is not set
|
|
|
|
|
CONFIG_DMA_OF=y
|
|
|
|
|
# CONFIG_DMA_VIRT_OPS is not set
|
|
|
|
|
# CONFIG_DRM_LIB_RANDOM is not set
|
|
|
|
|
CONFIG_DTC=y
|
|
|
|
|
CONFIG_EARLY_PRINTK=y
|
|
|
|
|
CONFIG_EDAC_ATOMIC_SCRUB=y
|
|
|
|
|
CONFIG_EDAC_SUPPORT=y
|
|
|
|
|
CONFIG_EXPORTFS=y
|
|
|
|
|
CONFIG_EXT4_FS=y
|
|
|
|
|
CONFIG_EXTCON=y
|
|
|
|
|
# CONFIG_F2FS_CHECK_FS is not set
|
|
|
|
|
CONFIG_F2FS_FS=y
|
|
|
|
|
# CONFIG_F2FS_FS_SECURITY is not set
|
|
|
|
|
CONFIG_F2FS_FS_XATTR=y
|
|
|
|
|
CONFIG_F2FS_STAT_FS=y
|
|
|
|
|
CONFIG_FIXED_PHY=y
|
|
|
|
|
CONFIG_FIX_EARLYCON_MEM=y
|
|
|
|
|
CONFIG_FS_MBCACHE=y
|
|
|
|
|
CONFIG_FUTEX_PI=y
|
|
|
|
|
CONFIG_GENERIC_ALLOCATOR=y
|
|
|
|
|
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
|
|
|
|
CONFIG_GENERIC_BUG=y
|
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
|
|
|
|
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
|
|
|
|
CONFIG_GENERIC_EARLY_IOREMAP=y
|
|
|
|
|
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
|
|
|
|
CONFIG_GENERIC_IO=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_CHIP=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
|
|
|
|
CONFIG_GENERIC_MSI_IRQ=y
|
|
|
|
|
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
|
|
|
|
CONFIG_GENERIC_PCI_IOMAP=y
|
|
|
|
|
CONFIG_GENERIC_PHY=y
|
|
|
|
|
CONFIG_GENERIC_SCHED_CLOCK=y
|
|
|
|
|
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
|
|
|
|
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
|
|
|
|
CONFIG_GENERIC_STRNLEN_USER=y
|
|
|
|
|
CONFIG_GLOB=y
|
|
|
|
|
CONFIG_GPIOLIB=y
|
2017-06-02 16:31:06 +00:00
|
|
|
CONFIG_GPIOLIB_IRQCHIP=y
|
|
|
|
|
CONFIG_GPIO_GENERIC=y
|
|
|
|
|
CONFIG_GPIO_GENERIC_PLATFORM=y
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_GPIO_MVEBU=y
|
|
|
|
|
CONFIG_GPIO_PCA953X=y
|
2017-06-02 16:31:06 +00:00
|
|
|
CONFIG_GPIO_PCA953X_IRQ=y
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_GPIO_SYSFS=y
|
|
|
|
|
# CONFIG_GRO_CELLS is not set
|
|
|
|
|
CONFIG_HANDLE_DOMAIN_IRQ=y
|
|
|
|
|
CONFIG_HARDIRQS_SW_RESEND=y
|
|
|
|
|
CONFIG_HAS_DMA=y
|
|
|
|
|
CONFIG_HAS_IOMEM=y
|
|
|
|
|
CONFIG_HAS_IOPORT_MAP=y
|
|
|
|
|
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
|
|
|
|
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
|
|
|
|
CONFIG_HAVE_ARCH_BITREVERSE=y
|
|
|
|
|
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
|
|
|
|
CONFIG_HAVE_ARCH_KGDB=y
|
|
|
|
|
CONFIG_HAVE_ARCH_PFN_VALID=y
|
|
|
|
|
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
|
|
|
|
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
|
|
|
|
CONFIG_HAVE_ARM_SCU=y
|
|
|
|
|
CONFIG_HAVE_ARM_SMCCC=y
|
|
|
|
|
CONFIG_HAVE_ARM_TWD=y
|
|
|
|
|
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
|
|
|
|
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
|
|
|
|
CONFIG_HAVE_CLK=y
|
|
|
|
|
CONFIG_HAVE_CLK_PREPARE=y
|
|
|
|
|
CONFIG_HAVE_CONTEXT_TRACKING=y
|
|
|
|
|
CONFIG_HAVE_C_RECORDMCOUNT=y
|
|
|
|
|
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
|
|
|
|
CONFIG_HAVE_DMA_API_DEBUG=y
|
|
|
|
|
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
|
|
|
|
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
|
|
|
|
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
|
|
|
|
CONFIG_HAVE_EBPF_JIT=y
|
|
|
|
|
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
|
|
|
|
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_TRACER=y
|
|
|
|
|
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
|
|
|
|
CONFIG_HAVE_IDE=y
|
|
|
|
|
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
|
|
|
|
CONFIG_HAVE_MEMBLOCK=y
|
|
|
|
|
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
|
|
|
|
CONFIG_HAVE_NET_DSA=y
|
|
|
|
|
CONFIG_HAVE_OPROFILE=y
|
|
|
|
|
CONFIG_HAVE_OPTPROBES=y
|
|
|
|
|
CONFIG_HAVE_PERF_EVENTS=y
|
|
|
|
|
CONFIG_HAVE_PERF_REGS=y
|
|
|
|
|
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
|
|
|
|
CONFIG_HAVE_PROC_CPU=y
|
|
|
|
|
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
|
|
|
|
CONFIG_HAVE_SMP=y
|
|
|
|
|
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
|
|
|
|
CONFIG_HAVE_UID16=y
|
|
|
|
|
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
|
|
|
|
CONFIG_HIGHMEM=y
|
|
|
|
|
# CONFIG_HIGHPTE is not set
|
|
|
|
|
CONFIG_HOTPLUG_CPU=y
|
|
|
|
|
CONFIG_HWBM=y
|
|
|
|
|
CONFIG_HWMON=y
|
|
|
|
|
CONFIG_HZ_FIXED=0
|
|
|
|
|
CONFIG_HZ_PERIODIC=y
|
|
|
|
|
CONFIG_I2C=y
|
|
|
|
|
CONFIG_I2C_BOARDINFO=y
|
|
|
|
|
CONFIG_I2C_CHARDEV=y
|
|
|
|
|
CONFIG_I2C_MV64XXX=y
|
|
|
|
|
# CONFIG_I2C_PXA is not set
|
|
|
|
|
CONFIG_INITRAMFS_SOURCE=""
|
|
|
|
|
CONFIG_IOMMU_HELPER=y
|
|
|
|
|
CONFIG_IRQCHIP=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN_DEBUG=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
|
|
|
|
CONFIG_IRQ_FORCED_THREADING=y
|
|
|
|
|
CONFIG_IRQ_WORK=y
|
|
|
|
|
# CONFIG_IWMMXT is not set
|
|
|
|
|
CONFIG_JBD2=y
|
|
|
|
|
CONFIG_LEDS_GPIO=y
|
|
|
|
|
CONFIG_LEDS_PCA963X=y
|
|
|
|
|
CONFIG_LEDS_TLC591XX=y
|
|
|
|
|
CONFIG_LEDS_TRIGGER_DISK=y
|
|
|
|
|
CONFIG_LIBFDT=y
|
|
|
|
|
CONFIG_LOCK_SPIN_ON_OWNER=y
|
|
|
|
|
CONFIG_LZO_COMPRESS=y
|
|
|
|
|
CONFIG_LZO_DECOMPRESS=y
|
|
|
|
|
CONFIG_MACH_ARMADA_370=y
|
|
|
|
|
# CONFIG_MACH_ARMADA_375 is not set
|
|
|
|
|
CONFIG_MACH_ARMADA_38X=y
|
|
|
|
|
# CONFIG_MACH_ARMADA_39X is not set
|
|
|
|
|
CONFIG_MACH_ARMADA_XP=y
|
|
|
|
|
# CONFIG_MACH_DOVE is not set
|
|
|
|
|
CONFIG_MACH_MVEBU_ANY=y
|
|
|
|
|
CONFIG_MACH_MVEBU_V7=y
|
|
|
|
|
CONFIG_MAGIC_SYSRQ=y
|
|
|
|
|
CONFIG_MANGLE_BOOTARGS=y
|
|
|
|
|
CONFIG_MARVELL_PHY=y
|
|
|
|
|
CONFIG_MDIO_BUS=y
|
|
|
|
|
CONFIG_MDIO_DEVICE=y
|
|
|
|
|
CONFIG_MDIO_I2C=y
|
|
|
|
|
CONFIG_MEMORY=y
|
|
|
|
|
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
|
|
|
|
CONFIG_MIGHT_HAVE_PCI=y
|
|
|
|
|
CONFIG_MMC=y
|
|
|
|
|
CONFIG_MMC_BLOCK=y
|
|
|
|
|
CONFIG_MMC_MVSDIO=y
|
|
|
|
|
CONFIG_MMC_SDHCI=y
|
|
|
|
|
# CONFIG_MMC_SDHCI_PCI is not set
|
|
|
|
|
CONFIG_MMC_SDHCI_PLTFM=y
|
|
|
|
|
CONFIG_MMC_SDHCI_PXAV3=y
|
|
|
|
|
# CONFIG_MMC_TIFM_SD is not set
|
|
|
|
|
CONFIG_MODULES_USE_ELF_REL=y
|
|
|
|
|
CONFIG_MTD_CFI_STAA=y
|
|
|
|
|
CONFIG_MTD_M25P80=y
|
|
|
|
|
CONFIG_MTD_NAND=y
|
|
|
|
|
CONFIG_MTD_NAND_ECC=y
|
|
|
|
|
CONFIG_MTD_NAND_PXA3xx=y
|
|
|
|
|
CONFIG_MTD_SPI_NOR=y
|
|
|
|
|
CONFIG_MTD_SPLIT_FIRMWARE=y
|
|
|
|
|
CONFIG_MTD_UBI=y
|
|
|
|
|
CONFIG_MTD_UBI_BEB_LIMIT=20
|
|
|
|
|
CONFIG_MTD_UBI_BLOCK=y
|
|
|
|
|
# CONFIG_MTD_UBI_FASTMAP is not set
|
|
|
|
|
# CONFIG_MTD_UBI_GLUEBI is not set
|
|
|
|
|
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
|
|
|
|
CONFIG_MULTI_IRQ_HANDLER=y
|
|
|
|
|
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
|
|
|
|
CONFIG_MVEBU_CLK_COMMON=y
|
|
|
|
|
CONFIG_MVEBU_CLK_COREDIV=y
|
|
|
|
|
CONFIG_MVEBU_CLK_CPU=y
|
|
|
|
|
CONFIG_MVEBU_DEVBUS=y
|
|
|
|
|
CONFIG_MVEBU_MBUS=y
|
|
|
|
|
CONFIG_MVMDIO=y
|
|
|
|
|
CONFIG_MVNETA=y
|
|
|
|
|
CONFIG_MVNETA_BM=y
|
|
|
|
|
CONFIG_MVNETA_BM_ENABLE=y
|
|
|
|
|
CONFIG_MVPP2=y
|
|
|
|
|
CONFIG_MVSW61XX_PHY=y
|
|
|
|
|
CONFIG_MV_XOR=y
|
|
|
|
|
CONFIG_NEED_DMA_MAP_STATE=y
|
|
|
|
|
CONFIG_NEON=y
|
2017-06-02 16:31:06 +00:00
|
|
|
CONFIG_NET_DSA=y
|
|
|
|
|
CONFIG_NET_DSA_MV88E6XXX=y
|
|
|
|
|
CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
|
|
|
|
|
CONFIG_NET_DSA_TAG_DSA=y
|
|
|
|
|
CONFIG_NET_DSA_TAG_EDSA=y
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_NET_FLOW_LIMIT=y
|
2017-06-02 16:31:06 +00:00
|
|
|
CONFIG_NET_SWITCHDEV=y
|
2017-12-21 11:13:30 +00:00
|
|
|
CONFIG_NLS=y
|
|
|
|
|
CONFIG_NOP_USB_XCEIV=y
|
|
|
|
|
CONFIG_NO_BOOTMEM=y
|
|
|
|
|
CONFIG_NR_CPUS=4
|
|
|
|
|
CONFIG_OF=y
|
|
|
|
|
CONFIG_OF_ADDRESS=y
|
|
|
|
|
CONFIG_OF_ADDRESS_PCI=y
|
|
|
|
|
CONFIG_OF_EARLY_FLATTREE=y
|
|
|
|
|
CONFIG_OF_FLATTREE=y
|
|
|
|
|
CONFIG_OF_GPIO=y
|
|
|
|
|
CONFIG_OF_IRQ=y
|
|
|
|
|
CONFIG_OF_MDIO=y
|
|
|
|
|
CONFIG_OF_NET=y
|
|
|
|
|
CONFIG_OF_PCI=y
|
|
|
|
|
CONFIG_OF_PCI_IRQ=y
|
|
|
|
|
CONFIG_OF_RESERVED_MEM=y
|
|
|
|
|
CONFIG_OLD_SIGACTION=y
|
|
|
|
|
CONFIG_OLD_SIGSUSPEND3=y
|
|
|
|
|
CONFIG_ORION_WATCHDOG=y
|
|
|
|
|
CONFIG_OUTER_CACHE=y
|
|
|
|
|
CONFIG_OUTER_CACHE_SYNC=y
|
|
|
|
|
CONFIG_PADATA=y
|
|
|
|
|
CONFIG_PAGE_OFFSET=0xC0000000
|
|
|
|
|
CONFIG_PCI=y
|
|
|
|
|
CONFIG_PCI_DOMAINS=y
|
|
|
|
|
CONFIG_PCI_DOMAINS_GENERIC=y
|
|
|
|
|
CONFIG_PCI_MSI=y
|
|
|
|
|
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
|
|
|
|
CONFIG_PCI_MVEBU=y
|
|
|
|
|
CONFIG_PERF_USE_VMALLOC=y
|
|
|
|
|
CONFIG_PGTABLE_LEVELS=2
|
|
|
|
|
CONFIG_PHYLIB=y
|
|
|
|
|
CONFIG_PHYLINK=y
|
|
|
|
|
# CONFIG_PHY_MVEBU_CP110_COMPHY is not set
|
|
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
|
CONFIG_PINCTRL_ARMADA_370=y
|
|
|
|
|
CONFIG_PINCTRL_ARMADA_38X=y
|
|
|
|
|
CONFIG_PINCTRL_ARMADA_XP=y
|
|
|
|
|
CONFIG_PINCTRL_MVEBU=y
|
|
|
|
|
# CONFIG_PINCTRL_SINGLE is not set
|
|
|
|
|
CONFIG_PJ4B_ERRATA_4742=y
|
|
|
|
|
# CONFIG_PL310_ERRATA_588369 is not set
|
|
|
|
|
# CONFIG_PL310_ERRATA_727915 is not set
|
|
|
|
|
# CONFIG_PL310_ERRATA_753970 is not set
|
|
|
|
|
# CONFIG_PL310_ERRATA_769419 is not set
|
|
|
|
|
CONFIG_PLAT_ORION=y
|
|
|
|
|
CONFIG_PM_OPP=y
|
|
|
|
|
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=11
|
|
|
|
|
CONFIG_PWM=y
|
|
|
|
|
CONFIG_PWM_SYSFS=y
|
|
|
|
|
CONFIG_RATIONAL=y
|
|
|
|
|
CONFIG_RCU_NEED_SEGCBLIST=y
|
|
|
|
|
CONFIG_RCU_STALL_COMMON=y
|
|
|
|
|
CONFIG_REGMAP=y
|
|
|
|
|
CONFIG_REGMAP_I2C=y
|
|
|
|
|
CONFIG_REGMAP_MMIO=y
|
|
|
|
|
CONFIG_REGMAP_SPI=y
|
|
|
|
|
CONFIG_REGULATOR=y
|
|
|
|
|
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
|
|
|
|
CONFIG_RFS_ACCEL=y
|
|
|
|
|
CONFIG_RPS=y
|
|
|
|
|
CONFIG_RTC_CLASS=y
|
|
|
|
|
CONFIG_RTC_DRV_ARMADA38X=y
|
|
|
|
|
CONFIG_RTC_DRV_MV=y
|
|
|
|
|
CONFIG_RTC_I2C_AND_SPI=y
|
|
|
|
|
CONFIG_RTC_MC146818_LIB=y
|
|
|
|
|
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
|
|
|
|
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
|
|
|
|
CONFIG_SATA_AHCI_PLATFORM=y
|
|
|
|
|
CONFIG_SATA_MV=y
|
|
|
|
|
# CONFIG_SCHED_INFO is not set
|
|
|
|
|
CONFIG_SCSI=y
|
|
|
|
|
CONFIG_SENSORS_PWM_FAN=y
|
|
|
|
|
CONFIG_SENSORS_TMP421=y
|
|
|
|
|
CONFIG_SERIAL_8250_DW=y
|
|
|
|
|
CONFIG_SERIAL_8250_FSL=y
|
|
|
|
|
CONFIG_SERIAL_MVEBU_CONSOLE=y
|
|
|
|
|
CONFIG_SERIAL_MVEBU_UART=y
|
|
|
|
|
CONFIG_SFP=y
|
|
|
|
|
CONFIG_SG_POOL=y
|
|
|
|
|
CONFIG_SMP=y
|
|
|
|
|
CONFIG_SMP_ON_UP=y
|
|
|
|
|
CONFIG_SOC_BUS=y
|
|
|
|
|
CONFIG_SPARSE_IRQ=y
|
|
|
|
|
CONFIG_SPI=y
|
|
|
|
|
# CONFIG_SPI_ARMADA_3700 is not set
|
|
|
|
|
CONFIG_SPI_MASTER=y
|
|
|
|
|
CONFIG_SPI_ORION=y
|
|
|
|
|
CONFIG_SRAM=y
|
|
|
|
|
CONFIG_SRAM_EXEC=y
|
|
|
|
|
CONFIG_SRCU=y
|
|
|
|
|
CONFIG_SWCONFIG=y
|
|
|
|
|
CONFIG_SWIOTLB=y
|
|
|
|
|
CONFIG_SWPHY=y
|
|
|
|
|
CONFIG_SWP_EMULATE=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
|
|
|
|
CONFIG_THERMAL=y
|
|
|
|
|
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
|
|
|
|
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
|
|
|
|
CONFIG_THERMAL_GOV_STEP_WISE=y
|
|
|
|
|
CONFIG_THERMAL_HWMON=y
|
|
|
|
|
CONFIG_THERMAL_OF=y
|
|
|
|
|
CONFIG_THIN_ARCHIVES=y
|
|
|
|
|
# CONFIG_THUMB2_KERNEL is not set
|
|
|
|
|
CONFIG_TICK_CPU_ACCOUNTING=y
|
|
|
|
|
CONFIG_TIMER_OF=y
|
|
|
|
|
CONFIG_TIMER_PROBE=y
|
|
|
|
|
CONFIG_TREE_RCU=y
|
|
|
|
|
CONFIG_TREE_SRCU=y
|
|
|
|
|
CONFIG_UBIFS_FS=y
|
|
|
|
|
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
|
|
|
|
CONFIG_UBIFS_FS_LZO=y
|
|
|
|
|
CONFIG_UBIFS_FS_ZLIB=y
|
|
|
|
|
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
|
|
|
|
CONFIG_USB=y
|
|
|
|
|
CONFIG_USB_COMMON=y
|
|
|
|
|
CONFIG_USB_EHCI_HCD=y
|
|
|
|
|
CONFIG_USB_EHCI_HCD_ORION=y
|
|
|
|
|
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
|
|
|
|
CONFIG_USB_LEDS_TRIGGER_USBPORT=y
|
|
|
|
|
CONFIG_USB_PHY=y
|
|
|
|
|
CONFIG_USB_STORAGE=y
|
|
|
|
|
CONFIG_USB_SUPPORT=y
|
|
|
|
|
CONFIG_USB_XHCI_HCD=y
|
|
|
|
|
CONFIG_USB_XHCI_MVEBU=y
|
|
|
|
|
CONFIG_USB_XHCI_PLATFORM=y
|
|
|
|
|
CONFIG_USE_OF=y
|
|
|
|
|
CONFIG_VECTORS_BASE=0xffff0000
|
|
|
|
|
CONFIG_VFP=y
|
|
|
|
|
CONFIG_VFPv3=y
|
|
|
|
|
CONFIG_WATCHDOG_CORE=y
|
|
|
|
|
CONFIG_XPS=y
|
|
|
|
|
CONFIG_XZ_DEC_ARM=y
|
|
|
|
|
CONFIG_XZ_DEC_BCJ=y
|
|
|
|
|
CONFIG_ZBOOT_ROM_BSS=0x0
|
|
|
|
|
CONFIG_ZBOOT_ROM_TEXT=0x0
|
|
|
|
|
CONFIG_ZLIB_DEFLATE=y
|
|
|
|
|
CONFIG_ZLIB_INFLATE=y
|