2014-09-30 21:36:04 +00:00
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commit 065e0b64f71632f5ad7f00c102fde09c534cfbf0
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Tue Sep 30 11:00:33 2014 +0200
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ath9k: fix getting tx duration for dynack
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On AR9003, tx control and tx status are in separate descriptor rings.
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Tx duration is extracted from the tx control descriptor data, which
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ar9003_hw_proc_txdesc cannot access.
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Fix getting the duration by adding a separate callback for it.
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Acked-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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2014-09-29 18:51:25 +00:00
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commit fdf9a4517b60d847b9bc0a30249efd96559fa450
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Tue Sep 9 09:48:30 2014 +0200
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ath9k_hw: fix PLL clock initialization for newer SoC
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On AR934x and newer SoC devices, the layout of the AR_RTC_PLL_CONTROL
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register changed. This currently breaks at least 5/10 MHz operation.
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AR933x uses the old layout.
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It might also have been causing other stability issues because of the
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different location of the PLL_BYPASS bit which needs to be set during
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PLL clock initialization.
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This patch also removes more instances of hardcoded register values in
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favor of properly computed ones with the PLL_BYPASS bit added.
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Reported-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit b6d1f51cd8bdc9d952147a960fbf1f261d8e4188
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Mon Sep 8 18:35:08 2014 +0200
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ath9k_hw: reduce ANI spur immunity setting on HT40 extension channel
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The cycpwr_thr1 value needs to be lower on the extension channel than on
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the control channel, similar to how the register settings are programmed
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in the initvals.
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Also drop the unnecessary check for HT40 - this register can always be
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written. This patch has been reported to improve HT40 stability and
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throughput in some environments.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit 5ad2dfbaa19aa45d29184d30c8c5dae0e110074a
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Mon Sep 8 18:31:26 2014 +0200
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Revert "ath9k_hw: reduce ANI firstep range for older chips"
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This reverts commit 09efc56345be4146ab9fc87a55c837ed5d6ea1ab
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I've received reports that this change is decreasing throughput in some
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rare conditions on an AR9280 based device
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Cc: stable@vger.kernel.org
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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2014-09-27 20:52:11 +00:00
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commit 4c82fc569cf2f29e6c66d98ef4a1b0f3b6a98e9d
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Sat Sep 27 22:39:27 2014 +0200
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ath9k_hw: disable hardware ad-hoc flag on ar934x rev 3
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On AR934x rev 3, settin the ad-hoc flag completely messes up hardware
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state - beacons get stuck, almost no packets make it out, hardware is
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constantly reset.
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When leaving out that flag and setting up the hw like in AP mode, TSF
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timers won't be automatically synced, but at least the rest works.
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AR934x rev 2 and older are not affected by this bug
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit ecfb4b3fff006372ac5c40871f9bb182fd00444f
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Sat Sep 27 22:15:43 2014 +0200
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ath9k: use ah->get_mac_revision for all SoC devices if available
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It is needed for AR934x as well
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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2014-09-27 20:51:43 +00:00
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commit c11113bc25df22898fb995d3205bdc4f27c98073
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Sat Sep 27 18:04:58 2014 +0200
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ath5k: add missing include for debug code
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Needed for calling vmalloc()/vfree()
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit 83f76a9f9a42773c7eef90bb86b4b2c16b0b3755
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Sat Sep 27 15:58:51 2014 +0200
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ath5k: fix AHB kconfig dependency
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit ddd67f2a5cfd73fad4b78190025402d419b9f0a9
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Sat Sep 27 15:57:09 2014 +0200
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Revert "ath5k: Remove AHB bus support"
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This reverts commit 093ec3c5337434f40d77c1af06c139da3e5ba6dc.
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--- a/drivers/net/wireless/ath/ath5k/Kconfig
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+++ b/drivers/net/wireless/ath/ath5k/Kconfig
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@@ -2,12 +2,14 @@ config ATH5K
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tristate "Atheros 5xxx wireless cards support"
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depends on m
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depends on PCI && MAC80211
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+ depends on (PCI || ATHEROS_AR231X) && MAC80211
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select ATH_COMMON
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select MAC80211_LEDS
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select BACKPORT_LEDS_CLASS
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select BACKPORT_NEW_LEDS
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select BACKPORT_AVERAGE
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- select ATH5K_PCI
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+ select ATH5K_AHB if ATHEROS_AR231X
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+ select ATH5K_PCI if !ATHEROS_AR231X
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---help---
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This module adds support for wireless adapters based on
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Atheros 5xxx chipset.
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@@ -52,9 +54,16 @@ config ATH5K_TRACER
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If unsure, say N.
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+config ATH5K_AHB
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+ bool "Atheros 5xxx AHB bus support"
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+ depends on ATHEROS_AR231X
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+ ---help---
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+ This adds support for WiSoC type chipsets of the 5xxx Atheros
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+ family.
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+
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config ATH5K_PCI
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bool "Atheros 5xxx PCI bus support"
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- depends on PCI
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+ depends on !ATHEROS_AR231X
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---help---
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This adds support for PCI type chipsets of the 5xxx Atheros
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family.
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2014-06-05 14:55:07 +00:00
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--- /dev/null
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2014-09-27 20:51:43 +00:00
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+++ b/drivers/net/wireless/ath/ath5k/ahb.c
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@@ -0,0 +1,234 @@
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2014-06-05 14:55:07 +00:00
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+/*
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2014-09-27 20:51:43 +00:00
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+ * Copyright (c) 2008-2009 Atheros Communications Inc.
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+ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
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2014-06-05 14:55:07 +00:00
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+ *
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2014-09-27 20:51:43 +00:00
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+ * Permission to use, copy, modify, and/or distribute this software for any
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+ * purpose with or without fee is hereby granted, provided that the above
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+ * copyright notice and this permission notice appear in all copies.
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2014-06-05 14:55:07 +00:00
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+ *
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2014-09-27 20:51:43 +00:00
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+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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2014-06-05 14:55:07 +00:00
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+ */
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+
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2014-09-27 20:51:43 +00:00
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+#include <linux/nl80211.h>
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+#include <linux/platform_device.h>
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+#include <linux/etherdevice.h>
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+#include <linux/export.h>
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+#include <ar231x_platform.h>
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+#include "ath5k.h"
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+#include "debug.h"
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+#include "base.h"
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+#include "reg.h"
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+
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+/* return bus cachesize in 4B word units */
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+static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
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2014-06-05 14:55:07 +00:00
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+{
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2014-09-27 20:51:43 +00:00
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+ *csz = L1_CACHE_BYTES >> 2;
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2014-06-05 14:55:07 +00:00
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+}
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+
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2014-09-27 20:51:43 +00:00
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+static bool
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+ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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2014-06-05 14:55:07 +00:00
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+{
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2014-09-27 20:51:43 +00:00
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+ struct ath5k_hw *ah = common->priv;
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+ struct platform_device *pdev = to_platform_device(ah->dev);
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+ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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+ u16 *eeprom, *eeprom_end;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ eeprom = (u16 *) bcfg->radio;
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+ eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ eeprom += off;
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+ if (eeprom > eeprom_end)
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+ return false;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ *data = *eeprom;
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+ return true;
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+}
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+int ath5k_hw_read_srev(struct ath5k_hw *ah)
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2014-06-05 14:55:07 +00:00
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+{
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2014-09-27 20:51:43 +00:00
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+ struct platform_device *pdev = to_platform_device(ah->dev);
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+ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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+ ah->ah_mac_srev = bcfg->devid;
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+ return 0;
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2014-06-05 14:55:07 +00:00
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+}
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+
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2014-09-27 20:51:43 +00:00
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+static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
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2014-06-05 14:55:07 +00:00
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+{
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2014-09-27 20:51:43 +00:00
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+ struct platform_device *pdev = to_platform_device(ah->dev);
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+ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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+ u8 *cfg_mac;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ if (to_platform_device(ah->dev)->id == 0)
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+ cfg_mac = bcfg->config->wlan0_mac;
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+ else
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+ cfg_mac = bcfg->config->wlan1_mac;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ memcpy(mac, cfg_mac, ETH_ALEN);
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+ return 0;
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+}
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+static const struct ath_bus_ops ath_ahb_bus_ops = {
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+ .ath_bus_type = ATH_AHB,
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+ .read_cachesize = ath5k_ahb_read_cachesize,
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+ .eeprom_read = ath5k_ahb_eeprom_read,
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+ .eeprom_read_mac = ath5k_ahb_eeprom_read_mac,
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+};
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+/*Initialization*/
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+static int ath_ahb_probe(struct platform_device *pdev)
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+{
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+ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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+ struct ath5k_hw *ah;
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+ struct ieee80211_hw *hw;
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+ struct resource *res;
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+ void __iomem *mem;
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+ int irq;
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+ int ret = 0;
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+ u32 reg;
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+
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+ if (!dev_get_platdata(&pdev->dev)) {
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+ dev_err(&pdev->dev, "no platform data specified\n");
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+ ret = -EINVAL;
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+ goto err_out;
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+ }
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (res == NULL) {
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+ dev_err(&pdev->dev, "no memory resource found\n");
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+ ret = -ENXIO;
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+ goto err_out;
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+ }
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ mem = ioremap_nocache(res->start, resource_size(res));
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+ if (mem == NULL) {
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+ dev_err(&pdev->dev, "ioremap failed\n");
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+ ret = -ENOMEM;
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+ goto err_out;
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+ }
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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+ if (res == NULL) {
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+ dev_err(&pdev->dev, "no IRQ resource found\n");
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+ ret = -ENXIO;
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+ goto err_iounmap;
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+ }
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ irq = res->start;
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
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+ if (hw == NULL) {
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+ dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
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+ ret = -ENOMEM;
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+ goto err_iounmap;
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+ }
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2014-06-05 14:55:07 +00:00
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+
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2014-09-27 20:51:43 +00:00
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+ ah = hw->priv;
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+ ah->hw = hw;
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+ ah->dev = &pdev->dev;
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+ ah->iobase = mem;
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+ ah->irq = irq;
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+ ah->devid = bcfg->devid;
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+
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+ if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
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+ /* Enable WMAC AHB arbitration */
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+ reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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+ reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
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+ iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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+
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+ /* Enable global WMAC swapping */
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|
|
+ reg = ioread32((void __iomem *) AR5K_AR2315_BYTESWAP);
|
|
|
|
+ reg |= AR5K_AR2315_BYTESWAP_WMAC;
|
|
|
|
+ iowrite32(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
|
2014-06-05 14:55:07 +00:00
|
|
|
+ } else {
|
2014-09-27 20:51:43 +00:00
|
|
|
+ /* Enable WMAC DMA access (assuming 5312 or 231x*/
|
|
|
|
+ /* TODO: check other platforms */
|
|
|
|
+ reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
|
|
|
|
+ if (to_platform_device(ah->dev)->id == 0)
|
|
|
|
+ reg |= AR5K_AR5312_ENABLE_WLAN0;
|
|
|
|
+ else
|
|
|
|
+ reg |= AR5K_AR5312_ENABLE_WLAN1;
|
|
|
|
+ iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ /*
|
|
|
|
+ * On a dual-band AR5312, the multiband radio is only
|
|
|
|
+ * used as pass-through. Disable 2 GHz support in the
|
|
|
|
+ * driver for it
|
|
|
|
+ */
|
|
|
|
+ if (to_platform_device(ah->dev)->id == 0 &&
|
|
|
|
+ (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
|
|
|
|
+ (BD_WLAN1 | BD_WLAN0))
|
|
|
|
+ ah->ah_capabilities.cap_needs_2GHz_ovr = true;
|
|
|
|
+ else
|
|
|
|
+ ah->ah_capabilities.cap_needs_2GHz_ovr = false;
|
2014-06-05 14:55:07 +00:00
|
|
|
+ }
|
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
|
|
|
|
+ if (ret != 0) {
|
|
|
|
+ dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
|
|
|
|
+ ret = -ENODEV;
|
|
|
|
+ goto err_free_hw;
|
2014-06-05 14:55:07 +00:00
|
|
|
+ }
|
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ platform_set_drvdata(pdev, hw);
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ return 0;
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ err_free_hw:
|
|
|
|
+ ieee80211_free_hw(hw);
|
|
|
|
+ err_iounmap:
|
|
|
|
+ iounmap(mem);
|
|
|
|
+ err_out:
|
|
|
|
+ return ret;
|
2014-06-05 14:55:07 +00:00
|
|
|
+}
|
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+static int ath_ahb_remove(struct platform_device *pdev)
|
2014-06-05 14:55:07 +00:00
|
|
|
+{
|
2014-09-27 20:51:43 +00:00
|
|
|
+ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
|
|
|
|
+ struct ieee80211_hw *hw = platform_get_drvdata(pdev);
|
|
|
|
+ struct ath5k_hw *ah;
|
|
|
|
+ u32 reg;
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ if (!hw)
|
|
|
|
+ return 0;
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ ah = hw->priv;
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
|
|
|
|
+ /* Disable WMAC AHB arbitration */
|
|
|
|
+ reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
|
|
|
|
+ reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
|
|
|
|
+ iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
|
|
|
|
+ } else {
|
|
|
|
+ /*Stop DMA access */
|
|
|
|
+ reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
|
|
|
|
+ if (to_platform_device(ah->dev)->id == 0)
|
|
|
|
+ reg &= ~AR5K_AR5312_ENABLE_WLAN0;
|
|
|
|
+ else
|
|
|
|
+ reg &= ~AR5K_AR5312_ENABLE_WLAN1;
|
|
|
|
+ iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
|
|
|
|
+ }
|
2014-06-05 14:55:07 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ ath5k_deinit_ah(ah);
|
|
|
|
+ iounmap(ah->iobase);
|
|
|
|
+ ieee80211_free_hw(hw);
|
|
|
|
+
|
|
|
|
+ return 0;
|
2014-06-05 14:55:07 +00:00
|
|
|
+}
|
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+static struct platform_driver ath_ahb_driver = {
|
|
|
|
+ .probe = ath_ahb_probe,
|
|
|
|
+ .remove = ath_ahb_remove,
|
|
|
|
+ .driver = {
|
|
|
|
+ .name = "ar231x-wmac",
|
|
|
|
+ .owner = THIS_MODULE,
|
|
|
|
+ },
|
2014-06-05 14:55:07 +00:00
|
|
|
+};
|
2014-07-23 13:44:44 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+module_platform_driver(ath_ahb_driver);
|
|
|
|
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
|
|
|
|
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
|
|
|
|
@@ -1647,6 +1647,32 @@ static inline struct ath_regulatory *ath
|
|
|
|
return &(ath5k_hw_common(ah)->regulatory);
|
2014-09-09 08:03:00 +00:00
|
|
|
}
|
|
|
|
|
2014-09-27 20:51:43 +00:00
|
|
|
+#ifdef CONFIG_ATHEROS_AR231X
|
|
|
|
+#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
|
|
|
|
+{
|
|
|
|
+ /* On AR2315 and AR2317 the PCI clock domain registers
|
|
|
|
+ * are outside of the WMAC register space */
|
|
|
|
+ if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
|
|
|
|
+ (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
|
|
|
|
+ return AR5K_AR2315_PCI_BASE + reg;
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+ return ah->iobase + reg;
|
|
|
|
+}
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
|
|
|
|
+{
|
|
|
|
+ return ioread32(ath5k_ahb_reg(ah, reg));
|
2014-09-09 08:03:00 +00:00
|
|
|
+}
|
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
|
|
|
|
+{
|
|
|
|
+ iowrite32(val, ath5k_ahb_reg(ah, reg));
|
|
|
|
+}
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
+#else
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
|
2014-09-09 08:03:00 +00:00
|
|
|
{
|
2014-09-27 20:51:43 +00:00
|
|
|
return ioread32(ah->iobase + reg);
|
|
|
|
@@ -1657,6 +1683,8 @@ static inline void ath5k_hw_reg_write(st
|
|
|
|
iowrite32(val, ah->iobase + reg);
|
|
|
|
}
|
2014-09-09 08:03:00 +00:00
|
|
|
|
2014-09-27 20:51:43 +00:00
|
|
|
+#endif
|
2014-09-09 08:03:00 +00:00
|
|
|
+
|
2014-09-27 20:51:43 +00:00
|
|
|
static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
|
|
|
|
{
|
|
|
|
return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
|
|
|
|
--- a/drivers/net/wireless/ath/ath5k/base.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath5k/base.c
|
|
|
|
@@ -99,6 +99,15 @@ static int ath5k_reset(struct ath5k_hw *
|
|
|
|
|
|
|
|
/* Known SREVs */
|
|
|
|
static const struct ath5k_srev_name srev_names[] = {
|
|
|
|
+#ifdef CONFIG_ATHEROS_AR231X
|
|
|
|
+ { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
|
|
|
|
+ { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
|
|
|
|
+ { "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
|
|
|
|
+ { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
|
|
|
|
+ { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
|
|
|
|
+ { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
|
|
|
|
+ { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
|
|
|
|
+#else
|
|
|
|
{ "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
|
|
|
|
{ "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
|
|
|
|
{ "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
|
|
|
|
@@ -117,6 +126,7 @@ static const struct ath5k_srev_name srev
|
|
|
|
{ "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
|
|
|
|
{ "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
|
|
|
|
{ "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
|
|
|
|
+#endif
|
|
|
|
{ "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
|
|
|
|
{ "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
|
|
|
|
{ "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
|
|
|
|
@@ -132,6 +142,10 @@ static const struct ath5k_srev_name srev
|
|
|
|
{ "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
|
|
|
|
{ "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
|
|
|
|
{ "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
|
|
|
|
+#ifdef CONFIG_ATHEROS_AR231X
|
|
|
|
+ { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
|
|
|
|
+ { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
|
|
|
|
+#endif
|
|
|
|
{ "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
|
|
|
|
};
|
2014-09-09 08:03:00 +00:00
|
|
|
|
2014-09-27 20:51:43 +00:00
|
|
|
--- a/drivers/net/wireless/ath/ath5k/led.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath5k/led.c
|
|
|
|
@@ -163,14 +163,20 @@ int ath5k_init_leds(struct ath5k_hw *ah)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct ieee80211_hw *hw = ah->hw;
|
|
|
|
+#ifndef CONFIG_ATHEROS_AR231X
|
|
|
|
struct pci_dev *pdev = ah->pdev;
|
|
|
|
+#endif
|
|
|
|
char name[ATH5K_LED_MAX_NAME_LEN + 1];
|
|
|
|
const struct pci_device_id *match;
|
2014-09-09 08:03:00 +00:00
|
|
|
|
2014-09-27 20:51:43 +00:00
|
|
|
if (!ah->pdev)
|
|
|
|
return 0;
|
2014-09-14 11:40:51 +00:00
|
|
|
|
2014-09-27 20:51:43 +00:00
|
|
|
+#ifdef CONFIG_ATHEROS_AR231X
|
|
|
|
+ match = NULL;
|
|
|
|
+#else
|
|
|
|
match = pci_match_id(&ath5k_led_devices[0], pdev);
|
|
|
|
+#endif
|
|
|
|
if (match) {
|
|
|
|
__set_bit(ATH_STAT_LEDSOFT, ah->status);
|
|
|
|
ah->led_pin = ATH_PIN(match->driver_data);
|
|
|
|
--- a/drivers/net/wireless/ath/ath5k/debug.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath5k/debug.c
|
|
|
|
@@ -65,6 +65,7 @@
|
|
|
|
|
|
|
|
#include <linux/seq_file.h>
|
|
|
|
#include <linux/list.h>
|
|
|
|
+#include <linux/vmalloc.h>
|
|
|
|
#include "debug.h"
|
|
|
|
#include "ath5k.h"
|
|
|
|
#include "reg.h"
|
2014-09-27 20:52:11 +00:00
|
|
|
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
|
|
|
@@ -222,31 +222,28 @@ static void ath9k_hw_read_revisions(stru
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
+ if (ah->get_mac_revision)
|
|
|
|
+ ah->hw_version.macRev = ah->get_mac_revision();
|
|
|
|
+
|
|
|
|
switch (ah->hw_version.devid) {
|
|
|
|
case AR5416_AR9100_DEVID:
|
|
|
|
ah->hw_version.macVersion = AR_SREV_VERSION_9100;
|
|
|
|
break;
|
|
|
|
case AR9300_DEVID_AR9330:
|
|
|
|
ah->hw_version.macVersion = AR_SREV_VERSION_9330;
|
|
|
|
- if (ah->get_mac_revision) {
|
|
|
|
- ah->hw_version.macRev = ah->get_mac_revision();
|
|
|
|
- } else {
|
|
|
|
+ if (!ah->get_mac_revision) {
|
|
|
|
val = REG_READ(ah, AR_SREV);
|
|
|
|
ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
case AR9300_DEVID_AR9340:
|
|
|
|
ah->hw_version.macVersion = AR_SREV_VERSION_9340;
|
|
|
|
- val = REG_READ(ah, AR_SREV);
|
|
|
|
- ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
|
|
|
|
return;
|
|
|
|
case AR9300_DEVID_QCA955X:
|
|
|
|
ah->hw_version.macVersion = AR_SREV_VERSION_9550;
|
|
|
|
return;
|
|
|
|
case AR9300_DEVID_AR953X:
|
|
|
|
ah->hw_version.macVersion = AR_SREV_VERSION_9531;
|
|
|
|
- if (ah->get_mac_revision)
|
|
|
|
- ah->hw_version.macRev = ah->get_mac_revision();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-09-29 18:51:25 +00:00
|
|
|
@@ -704,6 +701,8 @@ static void ath9k_hw_init_pll(struct ath
|
|
|
|
{
|
|
|
|
u32 pll;
|
|
|
|
|
|
|
|
+ pll = ath9k_hw_compute_pll_control(ah, chan);
|
|
|
|
+
|
|
|
|
if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
|
|
|
|
/* program BB PLL ki and kd value, ki=0x4, kd=0x40 */
|
|
|
|
REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
|
|
|
|
@@ -754,7 +753,8 @@ static void ath9k_hw_init_pll(struct ath
|
|
|
|
REG_RMW_FIELD(ah, AR_CH0_DDR_DPLL3,
|
|
|
|
AR_CH0_DPLL3_PHASE_SHIFT, 0x1);
|
|
|
|
|
|
|
|
- REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
|
|
|
|
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL,
|
|
|
|
+ pll | AR_RTC_9300_PLL_BYPASS);
|
|
|
|
udelay(1000);
|
|
|
|
|
|
|
|
/* program refdiv, nint, frac to RTC register */
|
|
|
|
@@ -770,7 +770,8 @@ static void ath9k_hw_init_pll(struct ath
|
|
|
|
} else if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
|
|
|
|
u32 regval, pll2_divint, pll2_divfrac, refdiv;
|
|
|
|
|
|
|
|
- REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
|
|
|
|
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL,
|
|
|
|
+ pll | AR_RTC_9300_SOC_PLL_BYPASS);
|
|
|
|
udelay(1000);
|
|
|
|
|
|
|
|
REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16);
|
|
|
|
@@ -843,7 +844,6 @@ static void ath9k_hw_init_pll(struct ath
|
|
|
|
udelay(1000);
|
|
|
|
}
|
|
|
|
|
|
|
|
- pll = ath9k_hw_compute_pll_control(ah, chan);
|
|
|
|
if (AR_SREV_9565(ah))
|
|
|
|
pll |= 0x40000;
|
|
|
|
REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
|
|
|
|
@@ -1192,9 +1192,12 @@ static void ath9k_hw_set_operating_mode(
|
2014-09-27 20:52:11 +00:00
|
|
|
|
|
|
|
switch (opmode) {
|
|
|
|
case NL80211_IFTYPE_ADHOC:
|
|
|
|
- set |= AR_STA_ID1_ADHOC;
|
|
|
|
- REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
|
|
|
|
- break;
|
|
|
|
+ if (!AR_SREV_9340_13(ah)) {
|
|
|
|
+ set |= AR_STA_ID1_ADHOC;
|
|
|
|
+ REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+ /* fall through */
|
|
|
|
case NL80211_IFTYPE_MESH_POINT:
|
|
|
|
case NL80211_IFTYPE_AP:
|
|
|
|
set |= AR_STA_ID1_STA_AP;
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/reg.h
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/reg.h
|
|
|
|
@@ -903,6 +903,10 @@
|
|
|
|
#define AR_SREV_9340(_ah) \
|
|
|
|
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9340))
|
|
|
|
|
|
|
|
+#define AR_SREV_9340_13(_ah) \
|
|
|
|
+ (AR_SREV_9340((_ah)) && \
|
|
|
|
+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9340_13))
|
|
|
|
+
|
|
|
|
#define AR_SREV_9340_13_OR_LATER(_ah) \
|
|
|
|
(AR_SREV_9340((_ah)) && \
|
|
|
|
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9340_13))
|
2014-09-29 18:51:25 +00:00
|
|
|
@@ -1240,12 +1244,23 @@ enum {
|
|
|
|
#define AR_CH0_DPLL3_PHASE_SHIFT_S 23
|
|
|
|
#define AR_PHY_CCA_NOM_VAL_2GHZ -118
|
|
|
|
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_DIV_INT 0x0000003f
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_DIV_INT_S 0
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_DIV_FRAC 0x000fffc0
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_DIV_FRAC_S 6
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_REFDIV 0x01f00000
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_REFDIV_S 20
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_CLKSEL 0x06000000
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_CLKSEL_S 25
|
|
|
|
+#define AR_RTC_9300_SOC_PLL_BYPASS 0x08000000
|
|
|
|
+
|
|
|
|
#define AR_RTC_9300_PLL_DIV 0x000003ff
|
|
|
|
#define AR_RTC_9300_PLL_DIV_S 0
|
|
|
|
#define AR_RTC_9300_PLL_REFDIV 0x00003C00
|
|
|
|
#define AR_RTC_9300_PLL_REFDIV_S 10
|
|
|
|
#define AR_RTC_9300_PLL_CLKSEL 0x0000C000
|
|
|
|
#define AR_RTC_9300_PLL_CLKSEL_S 14
|
|
|
|
+#define AR_RTC_9300_PLL_BYPASS 0x00010000
|
|
|
|
|
|
|
|
#define AR_RTC_9160_PLL_DIV 0x000003ff
|
|
|
|
#define AR_RTC_9160_PLL_DIV_S 0
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
|
|
|
|
@@ -1004,9 +1004,11 @@ static bool ar5008_hw_ani_control_new(st
|
|
|
|
case ATH9K_ANI_FIRSTEP_LEVEL:{
|
|
|
|
u32 level = param;
|
|
|
|
|
|
|
|
- value = level;
|
|
|
|
+ value = level * 2;
|
|
|
|
REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
|
|
|
|
AR_PHY_FIND_SIG_FIRSTEP, value);
|
|
|
|
+ REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
|
|
|
|
+ AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
|
|
|
|
|
|
|
|
if (level != aniState->firstepLevel) {
|
|
|
|
ath_dbg(common, ANI,
|
|
|
|
@@ -1040,9 +1042,8 @@ static bool ar5008_hw_ani_control_new(st
|
|
|
|
REG_RMW_FIELD(ah, AR_PHY_TIMING5,
|
|
|
|
AR_PHY_TIMING5_CYCPWR_THR1, value);
|
|
|
|
|
|
|
|
- if (IS_CHAN_HT40(ah->curchan))
|
|
|
|
- REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
|
|
|
|
- AR_PHY_EXT_TIMING5_CYCPWR_THR1, value);
|
|
|
|
+ REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
|
|
|
|
+ AR_PHY_EXT_TIMING5_CYCPWR_THR1, value - 1);
|
|
|
|
|
|
|
|
if (level != aniState->spurImmunityLevel) {
|
|
|
|
ath_dbg(common, ANI,
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
|
|
|
@@ -517,6 +517,23 @@ static void ar9003_hw_spur_mitigate(stru
|
|
|
|
ar9003_hw_spur_mitigate_ofdm(ah, chan);
|
|
|
|
}
|
|
|
|
|
|
|
|
+static u32 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah,
|
|
|
|
+ struct ath9k_channel *chan)
|
|
|
|
+{
|
|
|
|
+ u32 pll;
|
|
|
|
+
|
|
|
|
+ pll = SM(0x5, AR_RTC_9300_SOC_PLL_REFDIV);
|
|
|
|
+
|
|
|
|
+ if (chan && IS_CHAN_HALF_RATE(chan))
|
|
|
|
+ pll |= SM(0x1, AR_RTC_9300_SOC_PLL_CLKSEL);
|
|
|
|
+ else if (chan && IS_CHAN_QUARTER_RATE(chan))
|
|
|
|
+ pll |= SM(0x2, AR_RTC_9300_SOC_PLL_CLKSEL);
|
|
|
|
+
|
|
|
|
+ pll |= SM(0x2c, AR_RTC_9300_SOC_PLL_DIV_INT);
|
|
|
|
+
|
|
|
|
+ return pll;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
|
|
|
|
struct ath9k_channel *chan)
|
|
|
|
{
|
|
|
|
@@ -1781,7 +1798,12 @@ void ar9003_hw_attach_phy_ops(struct ath
|
|
|
|
|
|
|
|
priv_ops->rf_set_freq = ar9003_hw_set_channel;
|
|
|
|
priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
|
|
|
|
- priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
|
|
|
|
+
|
|
|
|
+ if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
|
|
|
|
+ priv_ops->compute_pll_control = ar9003_hw_compute_pll_control_soc;
|
|
|
|
+ else
|
|
|
|
+ priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
|
|
|
|
+
|
|
|
|
priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
|
|
|
|
priv_ops->init_bb = ar9003_hw_init_bb;
|
|
|
|
priv_ops->process_ini = ar9003_hw_process_ini;
|
2014-09-30 21:36:04 +00:00
|
|
|
--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
|
|
|
|
@@ -381,16 +381,27 @@ static int ar9002_hw_proc_txdesc(struct
|
|
|
|
ts->evm1 = ads->AR_TxEVM1;
|
|
|
|
ts->evm2 = ads->AR_TxEVM2;
|
|
|
|
|
|
|
|
- status = ACCESS_ONCE(ads->ds_ctl4);
|
|
|
|
- ts->duration[0] = MS(status, AR_PacketDur0);
|
|
|
|
- ts->duration[1] = MS(status, AR_PacketDur1);
|
|
|
|
- status = ACCESS_ONCE(ads->ds_ctl5);
|
|
|
|
- ts->duration[2] = MS(status, AR_PacketDur2);
|
|
|
|
- ts->duration[3] = MS(status, AR_PacketDur3);
|
|
|
|
-
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
+static int ar9002_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
|
|
|
|
+{
|
|
|
|
+ struct ar5416_desc *ads = AR5416DESC(ds);
|
|
|
|
+
|
|
|
|
+ switch (index) {
|
|
|
|
+ case 0:
|
|
|
|
+ return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur0);
|
|
|
|
+ case 1:
|
|
|
|
+ return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur1);
|
|
|
|
+ case 2:
|
|
|
|
+ return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur2);
|
|
|
|
+ case 3:
|
|
|
|
+ return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur3);
|
|
|
|
+ default:
|
|
|
|
+ return -1;
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
|
|
|
|
u32 size, u32 flags)
|
|
|
|
{
|
|
|
|
@@ -413,4 +424,5 @@ void ar9002_hw_attach_mac_ops(struct ath
|
|
|
|
ops->get_isr = ar9002_hw_get_isr;
|
|
|
|
ops->set_txdesc = ar9002_set_txdesc;
|
|
|
|
ops->proc_txdesc = ar9002_hw_proc_txdesc;
|
|
|
|
+ ops->get_duration = ar9002_hw_get_duration;
|
|
|
|
}
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
|
|
|
@@ -355,11 +355,9 @@ static int ar9003_hw_proc_txdesc(struct
|
|
|
|
struct ath_tx_status *ts)
|
|
|
|
{
|
|
|
|
struct ar9003_txs *ads;
|
|
|
|
- struct ar9003_txc *adc;
|
|
|
|
u32 status;
|
|
|
|
|
|
|
|
ads = &ah->ts_ring[ah->ts_tail];
|
|
|
|
- adc = (struct ar9003_txc *)ads;
|
|
|
|
|
|
|
|
status = ACCESS_ONCE(ads->status8);
|
|
|
|
if ((status & AR_TxDone) == 0)
|
|
|
|
@@ -428,18 +426,29 @@ static int ar9003_hw_proc_txdesc(struct
|
|
|
|
ts->ts_rssi_ext1 = MS(status, AR_TxRSSIAnt11);
|
|
|
|
ts->ts_rssi_ext2 = MS(status, AR_TxRSSIAnt12);
|
|
|
|
|
|
|
|
- status = ACCESS_ONCE(adc->ctl15);
|
|
|
|
- ts->duration[0] = MS(status, AR_PacketDur0);
|
|
|
|
- ts->duration[1] = MS(status, AR_PacketDur1);
|
|
|
|
- status = ACCESS_ONCE(adc->ctl16);
|
|
|
|
- ts->duration[2] = MS(status, AR_PacketDur2);
|
|
|
|
- ts->duration[3] = MS(status, AR_PacketDur3);
|
|
|
|
-
|
|
|
|
memset(ads, 0, sizeof(*ads));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
+static int ar9003_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
|
|
|
|
+{
|
|
|
|
+ const struct ar9003_txc *adc = ds;
|
|
|
|
+
|
|
|
|
+ switch (index) {
|
|
|
|
+ case 0:
|
|
|
|
+ return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur0);
|
|
|
|
+ case 1:
|
|
|
|
+ return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur1);
|
|
|
|
+ case 2:
|
|
|
|
+ return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur2);
|
|
|
|
+ case 3:
|
|
|
|
+ return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur3);
|
|
|
|
+ default:
|
|
|
|
+ return 0;
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
|
|
|
|
{
|
|
|
|
struct ath_hw_ops *ops = ath9k_hw_ops(hw);
|
|
|
|
@@ -449,6 +458,7 @@ void ar9003_hw_attach_mac_ops(struct ath
|
|
|
|
ops->get_isr = ar9003_hw_get_isr;
|
|
|
|
ops->set_txdesc = ar9003_set_txdesc;
|
|
|
|
ops->proc_txdesc = ar9003_hw_proc_txdesc;
|
|
|
|
+ ops->get_duration = ar9003_hw_get_duration;
|
|
|
|
}
|
|
|
|
|
|
|
|
void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/dynack.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/dynack.c
|
|
|
|
@@ -202,7 +202,7 @@ void ath_dynack_sample_tx_ts(struct ath_
|
|
|
|
ridx = ts->ts_rateindex;
|
|
|
|
|
|
|
|
da->st_rbf.ts[da->st_rbf.t_rb].tstamp = ts->ts_tstamp;
|
|
|
|
- da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration[ts->ts_rateindex];
|
|
|
|
+ da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration;
|
|
|
|
ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_dest, hdr->addr1);
|
|
|
|
ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_src, hdr->addr2);
|
|
|
|
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
|
|
|
|
@@ -67,6 +67,12 @@ static inline int ath9k_hw_txprocdesc(st
|
|
|
|
return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
|
|
|
|
}
|
|
|
|
|
|
|
|
+static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
|
|
|
|
+ int index)
|
|
|
|
+{
|
|
|
|
+ return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
|
|
|
|
struct ath_hw_antcomb_conf *antconf)
|
|
|
|
{
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/hw.h
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/hw.h
|
|
|
|
@@ -691,6 +691,7 @@ struct ath_hw_ops {
|
|
|
|
struct ath_tx_info *i);
|
|
|
|
int (*proc_txdesc)(struct ath_hw *ah, void *ds,
|
|
|
|
struct ath_tx_status *ts);
|
|
|
|
+ int (*get_duration)(struct ath_hw *ah, const void *ds, int index);
|
|
|
|
void (*antdiv_comb_conf_get)(struct ath_hw *ah,
|
|
|
|
struct ath_hw_antcomb_conf *antconf);
|
|
|
|
void (*antdiv_comb_conf_set)(struct ath_hw *ah,
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/mac.h
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/mac.h
|
|
|
|
@@ -121,7 +121,7 @@ struct ath_tx_status {
|
|
|
|
u32 evm0;
|
|
|
|
u32 evm1;
|
|
|
|
u32 evm2;
|
|
|
|
- u32 duration[4];
|
|
|
|
+ u32 duration;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct ath_rx_status {
|
|
|
|
--- a/drivers/net/wireless/ath/ath9k/xmit.c
|
|
|
|
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
|
|
|
|
@@ -683,6 +683,8 @@ static void ath_tx_process_buffer(struct
|
|
|
|
if (bf_is_ampdu_not_probing(bf))
|
|
|
|
txq->axq_ampdu_depth--;
|
|
|
|
|
|
|
|
+ ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc,
|
|
|
|
+ ts->ts_rateindex);
|
|
|
|
if (!bf_isampdu(bf)) {
|
|
|
|
if (!flush) {
|
|
|
|
info = IEEE80211_SKB_CB(bf->bf_mpdu);
|