2013-06-23 15:50:49 +00:00
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From 0df8c2fdd0fe1095b834fbf2b098d6f1b3e56608 Mon Sep 17 00:00:00 2001
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2013-04-03 09:59:10 +00:00
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 25 Mar 2013 11:19:58 +0100
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2013-06-23 15:50:49 +00:00
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Subject: [PATCH 21/79] MIPS: ralink: add RT5350 sdram register defines
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2013-04-03 09:59:10 +00:00
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Add a few missing defines that are needed to make memory detection work on the
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RT5350.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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2013-04-25 19:02:42 +00:00
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Acked-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/5169/
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2013-04-03 09:59:10 +00:00
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---
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arch/mips/include/asm/mach-ralink/rt305x.h | 8 ++++++++
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1 file changed, 8 insertions(+)
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2013-06-23 15:50:49 +00:00
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diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h b/arch/mips/include/asm/mach-ralink/rt305x.h
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index e36c3c5..80cda8a 100644
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2013-04-03 09:59:10 +00:00
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--- a/arch/mips/include/asm/mach-ralink/rt305x.h
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+++ b/arch/mips/include/asm/mach-ralink/rt305x.h
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@@ -97,6 +97,14 @@ static inline int soc_is_rt5350(void)
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#define RT5350_SYSCFG0_CPUCLK_320 0x2
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#define RT5350_SYSCFG0_CPUCLK_300 0x3
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+#define RT5350_SYSCFG0_DRAM_SIZE_SHIFT 12
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+#define RT5350_SYSCFG0_DRAM_SIZE_MASK 7
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+#define RT5350_SYSCFG0_DRAM_SIZE_2M 0
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+#define RT5350_SYSCFG0_DRAM_SIZE_8M 1
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+#define RT5350_SYSCFG0_DRAM_SIZE_16M 2
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+#define RT5350_SYSCFG0_DRAM_SIZE_32M 3
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+#define RT5350_SYSCFG0_DRAM_SIZE_64M 4
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+
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/* multi function gpio pins */
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#define RT305X_GPIO_I2C_SD 1
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#define RT305X_GPIO_I2C_SCLK 2
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2013-06-23 15:50:49 +00:00
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--
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1.7.10.4
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