2016-10-28 16:14:32 +00:00
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#
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# Copyright (C) 2016 Jiang Yutang <jiangyutang1978@gmail.com>
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/image.mk
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2018-04-30 12:42:39 +00:00
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ITB_BOARDS = traverse-five64
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2018-07-09 10:38:10 +00:00
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define Build/ls-clean
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2016-10-28 16:14:32 +00:00
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rm -f $@
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endef
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2018-07-09 10:38:10 +00:00
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define Build/ls-append
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dd if=$(STAGING_DIR_IMAGE)/$(1) >> $@
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2016-10-28 16:14:32 +00:00
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endef
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2018-07-09 10:38:10 +00:00
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define Build/ls-append-dtb
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2016-10-28 16:14:32 +00:00
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$(call Image/BuildDTB,$(DTS_DIR)/$(1).dts,$(DTS_DIR)/$(1).dtb)
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dd if=$(DTS_DIR)/$(1).dtb >> $@
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endef
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2018-04-30 12:42:39 +00:00
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define Build/traverse-fit
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2018-08-15 08:41:41 +00:00
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./mkits-multiple-config.sh -o $@.its -A $(LINUX_KARCH) \
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-v $(LINUX_VERSION) -k $@ -a $(KERNEL_LOADADDR) \
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-e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
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2018-04-30 12:42:39 +00:00
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-C gzip -c 1 -c 2 \
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2018-08-15 08:41:41 +00:00
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-d $(DEVICE_DTS_DIR)/freescale/traverse-ls1043s.dtb \
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-D "Traverse_LS1043S" -n "ls1043s" -a $(FDT_LOADADDR) -c 1 \
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-d $(DEVICE_DTS_DIR)/freescale/traverse-ls1043v.dtb \
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-D "Traverse_LS1043V" -n "ls1043v" -a $(FDT_LOADADDR) -c 2
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2018-04-30 12:42:39 +00:00
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PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
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@mv -f $@.new $@
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endef
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2017-06-29 03:19:07 +00:00
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ifeq ($(SUBTARGET),armv8_64b)
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2018-08-15 08:41:41 +00:00
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include armv8_64b.mk
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2016-10-28 16:14:32 +00:00
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endif
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2016-10-28 16:18:23 +00:00
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2018-08-15 08:41:41 +00:00
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ifeq ($(SUBTARGET),armv8_32b)
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include armv8_32b.mk
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2017-10-10 11:17:37 +00:00
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endif
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layerscape: add ls2088ardb device support
The QorIQ LS2088A processor is built on the Layerscape
architecture combining eight ARM A72 processor cores
with advanced, high-performance datapath acceleration
and network, peripheral interfaces required for
networking, telecom, wireless infrastructure, aerospace
applications and general-purpose embedded applications.
Features summary:
- Eight 64-bit ARM v8 Cortex-A72 CPUs
- Two 64-bit DDR4 SDRAM memory controller with ECC
- One 32-bit DDR3 SDRAM memory controller with ECC
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- IFC, 4 PCIe, 2 SATA, 2 USB, 1 SDXC, 2 DUARTs etc
Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
2016-12-27 17:28:02 +00:00
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2016-10-28 16:14:32 +00:00
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$(eval $(call BuildImage))
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