bc4f2c5ce4
According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz input clock as the REF_CLK instead of 5MHz. The correct CPU PLL calculation procedure is as follows: CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2. This patch is compatible with the current calculation procedure with default DIV and REF_DIV values. Test on both AR7240, AR7241 and AR7242. Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 46856 |
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| .. | ||
| base-files | ||
| files | ||
| generic | ||
| image | ||
| mikrotik | ||
| nand | ||
| patches-4.1 | ||
| base-files.mk | ||
| config-4.1 | ||
| Makefile | ||
| modules.mk | ||