f036956e1f
This adds USB initialization fixes for Danube, Amazon SE and xrx300 and should fix the clock on at least Danube which hopefully closes FS#351. The xrx200 usb driver now uses more memory for the dwc2 fifos, this was increased in the chip compared to ar9. This is based in part on the vendor documentation and the vendor code base as a reference. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
99 lines
3.5 KiB
Diff
99 lines
3.5 KiB
Diff
From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Fri, 6 Jan 2017 17:55:24 +0100
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Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs
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The size of the internal RAM of the DesignWare USB controller changed
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between the different Lantiq SoCs. We have the following sizes:
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Amazon + Danube: 8 KByte
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Amazon SE + arx100: 2 KByte
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xrx200 + xrx300: 2.5 KByte
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For Danube SoC we do not provide the params and let the driver decide
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to use sane defaults, for the Amazon SE and arx100 we use small fifos
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and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
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The auto detection of max_transfer_size and max_packet_count should
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work, so remove it.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++-------
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1 file changed, 39 insertions(+), 7 deletions(-)
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--- a/drivers/usb/dwc2/platform.c
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+++ b/drivers/usb/dwc2/platform.c
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@@ -116,7 +116,7 @@ static const struct dwc2_core_params par
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.hibernation = -1,
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};
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-static const struct dwc2_core_params params_ltq = {
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+static const struct dwc2_core_params params_ase = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_ver = -1,
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.dma_enable = -1,
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@@ -127,8 +127,8 @@ static const struct dwc2_core_params par
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.host_rx_fifo_size = 288, /* 288 DWORDs */
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.host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
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.host_perio_tx_fifo_size = 96, /* 96 DWORDs */
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- .max_transfer_size = 65535,
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- .max_packet_count = 511,
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+ .max_transfer_size = -1,
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+ .max_packet_count = -1,
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.host_channels = -1,
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.phy_type = -1,
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.phy_utmi_width = -1,
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@@ -140,8 +140,37 @@ static const struct dwc2_core_params par
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.host_ls_low_power_phy_clk = -1,
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.ts_dline = -1,
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.reload_ctl = -1,
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- .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
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- GAHBCFG_HBSTLEN_SHIFT,
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+ .ahbcfg = -1,
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+ .uframe_sched = -1,
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+ .external_id_pin_ctl = -1,
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+ .hibernation = -1,
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+};
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+
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+static const struct dwc2_core_params params_xrx200 = {
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+ .otg_cap = 2, /* non-HNP/non-SRP */
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+ .otg_ver = -1,
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+ .dma_enable = -1,
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+ .dma_desc_enable = -1,
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+ .speed = -1,
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+ .enable_dynamic_fifo = -1,
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+ .en_multiple_tx_fifo = -1,
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+ .host_rx_fifo_size = 288, /* 288 DWORDs */
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+ .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
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+ .host_perio_tx_fifo_size = 136, /* 136 DWORDs */
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+ .max_transfer_size = -1,
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+ .max_packet_count = -1,
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+ .host_channels = -1,
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+ .phy_type = -1,
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+ .phy_utmi_width = -1,
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+ .phy_ulpi_ddr = -1,
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+ .phy_ulpi_ext_vbus = -1,
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+ .i2c_enable = -1,
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+ .ulpi_fs_ls = -1,
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+ .host_support_fs_ls_low_power = -1,
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+ .host_ls_low_power_phy_clk = -1,
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+ .ts_dline = -1,
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+ .reload_ctl = -1,
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+ .ahbcfg = -1,
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.uframe_sched = -1,
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.external_id_pin_ctl = -1,
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.hibernation = -1,
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@@ -341,8 +370,11 @@ static int dwc2_driver_remove(struct pla
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static const struct of_device_id dwc2_of_match_table[] = {
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{ .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
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{ .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
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- { .compatible = "lantiq,arx100-usb", .data = ¶ms_ltq },
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- { .compatible = "lantiq,xrx200-usb", .data = ¶ms_ltq },
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+ { .compatible = "lantiq,danube-usb", .data = NULL },
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+ { .compatible = "lantiq,ase-usb", .data = ¶ms_ase },
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+ { .compatible = "lantiq,arx100-usb", .data = ¶ms_ase },
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+ { .compatible = "lantiq,xrx200-usb", .data = ¶ms_xrx200 },
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+ { .compatible = "lantiq,xrx300-usb", .data = ¶ms_xrx200 },
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{ .compatible = "snps,dwc2", .data = NULL },
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{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
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{},
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