41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
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From 9722009432a5553b11c8e0a04a275654de11dbc4 Mon Sep 17 00:00:00 2001
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From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
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Date: Mon, 13 Jun 2016 16:33:06 +0530
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Subject: [PATCH 53/93] armv8: arch-fsl-layerscape: Update name of Soc
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Update the name of the Soc.
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Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
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---
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arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 14 +++++++-------
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1 file changed, 7 insertions(+), 7 deletions(-)
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
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index e4ff990..7a943be 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
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@@ -8,13 +8,13 @@
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#define _FSL_LAYERSCAPE_CPU_H
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static struct cpu_type cpu_type_list[] = {
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- CPU_TYPE_ENTRY(LS2080, LS2080, 8),
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- CPU_TYPE_ENTRY(LS2085, LS2085, 8),
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- CPU_TYPE_ENTRY(LS2045, LS2045, 4),
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- CPU_TYPE_ENTRY(LS1043, LS1043, 4),
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- CPU_TYPE_ENTRY(LS1023, LS1023, 2),
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- CPU_TYPE_ENTRY(LS2040, LS2040, 4),
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- CPU_TYPE_ENTRY(LS1012, LS1012, 1),
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+ CPU_TYPE_ENTRY(LS2080A, LS2080, 8),
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+ CPU_TYPE_ENTRY(LS2085A, LS2085, 8),
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+ CPU_TYPE_ENTRY(LS2045A, LS2045, 4),
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+ CPU_TYPE_ENTRY(LS1043A, LS1043, 4),
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+ CPU_TYPE_ENTRY(LS1023A, LS1023, 2),
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+ CPU_TYPE_ENTRY(LS2040A, LS2040, 4),
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+ CPU_TYPE_ENTRY(LS1012A, LS1012, 1),
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};
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#ifndef CONFIG_SYS_DCACHE_OFF
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--
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1.7.9.5
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