openwrtv3/target/linux/ath79/dts/ar9342_iodata_etg3-r.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "ar9344.dtsi"

/ {
	compatible = "iodata,etg3-r", "qca,ar9344";
	model = "I-O DATA ETG3-R";

	aliases {
		led-boot = &power;
		led-failsafe = &power;
		led-running = &power;
		led-upgrade = &power;
	};

	leds {
		compatible = "gpio-leds";

		power: power {
			label = "etg3-r:green:power";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		notification {
			label = "etg3-r:green:notification";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};
};

&spi {
	num-cs = <1>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x000000 0x040000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x040000 0x010000>;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x050000 0x780000>;
			};

			partition@7d0000 {
				label = "Config";
				reg = <0x07d0000 0x10000>;
				read-only;
			};

			partition@7e0000 {
				label = "Rsv";
				reg = <0x07e0000 0x10000>;
				read-only;
			};

			partition@7f0000 {
				label = "ART";
				reg = <0x7f0000 0x010000>;
				read-only;
			};
		};
	};
};

&mdio0 {
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;
		phy-mode = "rgmii";

		qca,ar8327-initvals = <
			0x04 0x07600000 /* PORT0 PAD MODE CTRL */
			0x50 0xffb7ffb7 /* LED_CTRL0 */
			0x54 0xffb7ffb7 /* LED_CTRL1 */
			0x58 0xffb7ffb7 /* LED_CTRL2 */
			0x5c 0x03ffff00 /* LED_CTRL3 */
			0x7c 0x0000007e /* PORT0_STATUS */
		>;
	};
};

&eth0 {
	status = "okay";

	pll-data = <0x06000000 0x00000101 0x00001616>;

	phy-mode = "rgmii";
	phy-handle = <&phy0>;
};

&uart {
	status = "okay";
};