mirror of
https://github.com/nqrduck/ATM.git
synced 2024-12-01 22:33:13 +00:00
336 lines
7.7 KiB
C++
336 lines
7.7 KiB
C++
#include "ADF4351.h"
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#define ADF_FREQ_MAX 4294967295UL ///< Maximum Generated Frequency = value of MAX Unsigned Long
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#define ADF_FREQ_MIN 34385000UL ///< Minimum Generated Frequency
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#define ADF_PFD_MAX 32000000.0 ///< Maximum Frequency for Phase Detector
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#define ADF_PFD_MIN 125000.0 ///< Minimum Frequency for Phase Detector
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#define ADF_REFIN_MAX 250000000UL ///< Maximum Reference Frequency
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#define REF_FREQ_DEFAULT 250000000UL ///< Default Reference Frequency
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uint32_t steps[] = { 1000, 5000, 10000, 50000, 100000 , 500000, 1000000 }; ///< Array of Allowed Step Values (Hz)
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/*!
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single register constructor
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*/
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Reg::Reg()
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{
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whole = 0 ;
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}
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uint32_t Reg::get()
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{
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return whole ;
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}
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void Reg::set(uint32_t value)
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{
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whole = value ;
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}
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void Reg::setbf(uint8_t start, uint8_t len, uint32_t value)
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{
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uint32_t bitmask = ((1UL << len) - 1UL) ;
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value &= bitmask ;
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bitmask <<= start ;
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whole = ( whole & ( ~bitmask)) | ( value << start ) ;
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}
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uint32_t Reg::getbf(uint8_t start, uint8_t len)
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{
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uint32_t bitmask = ((1UL << len) - 1UL) << start ;
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uint32_t result = ( whole & bitmask) >> start ;
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return ( result ) ;
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}
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// Constructor function; initializes communication pinouts
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ADF4351::ADF4351(int SCLK, int DATA, int LE, int CE){
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_sclk = SCLK;
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_data=DATA;
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_le=LE;
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_ce=CE;
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SPIClass SPI1(HSPI);
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spi_settings = SPISettings(1000000UL, MSBFIRST, SPI_MODE0) ;
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reffreq = REF_FREQ_DEFAULT ;
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cfreq = 0 ;
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ChanStep = steps[0] ;
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RD2refdouble = 0 ;
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RCounter = 25 ;
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RD1Rdiv2 = 0 ;
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BandSelClock = 80 ;
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ClkDiv = 150 ;
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Prescaler = 0 ;
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pwrlevel = 0 ;
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}
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void ADF4351::begin(void){
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pinMode(_sclk, OUTPUT);
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pinMode(_data, OUTPUT);
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pinMode(_le, OUTPUT);
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pinMode(_ce, OUTPUT);
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SPI1.begin();
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}
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int ADF4351::setf(uint32_t freq)
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{
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// calculate settings from freq
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if ( freq > ADF_FREQ_MAX ) return 1 ;
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if ( freq < ADF_FREQ_MIN ) return 1 ;
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int localosc_ratio = 2200000000UL / freq ;
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outdiv = 1 ;
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int RfDivSel = 0 ;
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// select the output divider
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while ( outdiv <= localosc_ratio && outdiv <= 64 ) {
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outdiv *= 2 ;
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RfDivSel++ ;
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}
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if ( freq > 3600000000UL/outdiv )
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Prescaler = 1 ;
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else
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Prescaler = 0 ;
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PFDFreq = (float) reffreq * ( (float) ( 1.0 + RD2refdouble) / (float) (RCounter * (1.0 + RD1Rdiv2))); // find the loop freq
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BigNumber::begin(10) ;
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char tmpstr[20] ;
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// kludge - BigNumber doesn't like leading spaces
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// so you need to make sure the string passed doesnt
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// have leading spaces.
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int cntdigits = 0 ;
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uint32_t num = (uint32_t) ( PFDFreq / 10000 ) ;
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while ( num != 0 ) {
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cntdigits++ ;
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num /= 10 ;
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}
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dtostrf(PFDFreq, cntdigits + 8 , 3, tmpstr) ;
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// end of kludge
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BigNumber BN_PFDFreq = BigNumber(tmpstr) ;
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BigNumber BN_N = ( BigNumber(freq) * BigNumber(outdiv) ) / BN_PFDFreq ;
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N_Int = (uint16_t) ( (uint32_t) BN_N ) ;
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BigNumber BN_Mod = BN_PFDFreq / BigNumber(ChanStep) ;
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Mod = BN_Mod ;
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BN_Mod = BigNumber(Mod) ;
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BigNumber BN_Frac = ((BN_N - BigNumber(N_Int)) * BN_Mod) + BigNumber("0.5") ;
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Frac = (int) ( (uint32_t) BN_Frac);
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BN_N = BigNumber(N_Int) ;
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if ( Frac != 0 ) {
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uint32_t gcd = gcd_iter(Frac, Mod) ;
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if ( gcd > 1 ) {
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Frac /= gcd ;
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BN_Frac = BigNumber(Frac) ;
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Mod /= gcd ;
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BN_Mod = BigNumber(Mod) ;
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}
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}
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BigNumber BN_cfreq ;
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if ( Frac == 0 ) {
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BN_cfreq = ( BN_PFDFreq * BN_N) / BigNumber(outdiv) ;
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} else {
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BN_cfreq = ( BN_PFDFreq * ( BN_N + ( BN_Frac / BN_Mod) ) ) / BigNumber(outdiv) ;
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}
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cfreq = BN_cfreq ;
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if ( cfreq != freq ) Serial.println(F("output freq diff than requested")) ;
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BigNumber::finish() ;
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if ( Mod < 2 || Mod > 4095) {
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Serial.println(F("Mod out of range")) ;
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return 1 ;
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}
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if ( (uint32_t) Frac > (Mod - 1) ) {
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Serial.println(F("Frac out of range")) ;
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return 1 ;
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}
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if ( Prescaler == 0 && ( N_Int < 23 || N_Int > 65535)) {
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Serial.println(F("N_Int out of range")) ;
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return 1;
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} else if ( Prescaler == 1 && ( N_Int < 75 || N_Int > 65535 )) {
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Serial.println(F("N_Int out of range")) ;
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return 1;
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}
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// setting the registers to default values
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// R0
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R[0].set(0UL) ;
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// (0,3,0) control bits
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R[0].setbf(3, 12, Frac) ; // fractonal
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R[0].setbf(15, 16, N_Int) ; // N integer
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// R1
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R[1].set(0UL) ;
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R[1].setbf(0, 3, 1) ; // control bits
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R[1].setbf(3, 12, Mod) ; // Mod
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R[1].setbf(15, 12, 1); // phase
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R[1].setbf(27, 1, Prescaler); // prescaler
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// (28,1,0) phase adjust
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// R2
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R[2].set(0UL) ;
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R[2].setbf(0, 3, 2) ; // control bits
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// (3,1,0) counter reset
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// (4,1,0) cp3 state
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// (5,1,0) power down
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R[2].setbf(6, 1, 1) ; // pd polarity
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if ( Frac == 0 ) {
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R[2].setbf(7, 1, 1) ; // LDP, int-n mode
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R[2].setbf(8, 1, 1) ; // ldf, int-n mode
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} else {
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R[2].setbf(7, 1, 0) ; // LDP, frac-n mode
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R[2].setbf(8, 1, 0) ; // ldf ,frac-n mode
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}
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R[2].setbf(9, 4, 7) ; // charge pump
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// (13,1,0) dbl buf
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R[2].setbf(14, 10, RCounter) ; // r counter
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R[2].setbf(24, 1, RD1Rdiv2) ; // RD1_RDiv2
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R[2].setbf(25, 1, RD2refdouble) ; // RD2refdouble
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// R[2].setbf(26,3,0) ; // muxout, not used
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// (29,2,0) low noise and spurs mode
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// R3
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R[3].set(0UL) ;
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R[3].setbf(0, 3, 3) ; // control bits
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R[3].setbf(3, 12, ClkDiv) ; // clock divider
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// (15,2,0) clk div mode
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// (17,1,0) reserved
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// (18,1,0) CSR
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// (19,2,0) reserved
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if ( Frac == 0 ) {
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R[3].setbf(21, 1, 1); // charge cancel, reduces pfd spurs
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R[3].setbf(22, 1, 1); // ABP, int-n
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} else {
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R[3].setbf(21, 1, 0) ; // charge cancel
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R[3].setbf(22, 1, 0); // ABP, frac-n
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}
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R[3].setbf(23, 1, 1) ; // Band Select Clock Mode
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// (24,8,0) reserved
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// R4
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R[4].set(0UL) ;
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R[4].setbf(0, 3, 4) ; // control bits
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R[4].setbf(3, 2, pwrlevel) ; // output power 0-3 (-4dbM to 5dbM, 3db steps)
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R[4].setbf(5, 1, 1) ; // rf output enable
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// (6,2,0) aux output power
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// (8,1,0) aux output enable
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// (9,1,0) aux output select
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// (10,1,0) mtld
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// (11,1,0) vco power down
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R[4].setbf(12, 8, BandSelClock) ; // band select clock divider
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R[4].setbf(20, 3, RfDivSel) ; // rf divider select
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R[4].setbf(23, 1, 1) ; // feedback select
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// (24,8,0) reserved
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// R5
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R[5].set(0UL) ;
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R[5].setbf(0, 3, 5) ; // control bits
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// (3,16,0) reserved
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R[5].setbf(19, 2, 3) ; // Reserved field,set to 11
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// (21,1,0) reserved
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R[5].setbf(22, 2, 1) ; // LD Pin Mode
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// (24,8,0) reserved
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int i ;
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SPI1.beginTransaction(spi_settings);
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for (i = 5 ; i > -1 ; i--) {
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WriteRegister(getReg(i)) ;
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//delayMicroseconds(2500) ;
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}
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SPI1.endTransaction();
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return 0 ; // ok
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}
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int ADF4351::setrf(uint32_t f)
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{
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if ( f > ADF_REFIN_MAX ) return 1 ;
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if ( f < 100000UL ) return 1 ;
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float newfreq = (float) f * ( (float) ( 1.0 + RD2refdouble) / (float) (RCounter * (1.0 + RD1Rdiv2))); // check the loop freq
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if ( newfreq > ADF_PFD_MAX ) return 1 ;
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if ( newfreq < ADF_PFD_MIN ) return 1 ;
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reffreq = f ;
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return 0 ;
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}
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// write data into register
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void ADF4351::WriteRegister(uint32_t regData){
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/*digitalWrite(_le, LOW);
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_regData = regData;
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for(int i=0; i<32; i++)
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{
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if(((_regData<<i)&0x80000000)==0x80000000)
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{
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digitalWrite(_data,1);
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}
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else
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{
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digitalWrite(_data,0) ;
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}
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digitalWrite(_sclk, HIGH);
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delay(1);
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digitalWrite(_sclk, LOW);
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}
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// load data into register
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digitalWrite(_le, HIGH);
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delay(1);
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digitalWrite(_le, LOW);*/
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byte txbyte ;
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digitalWrite(_le, LOW) ;
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for (int i = 3 ; i > -1 ; i--) {
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txbyte = (byte) (regData >> (i * 8)) ;
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SPI1.transfer(txbyte) ;
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}
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digitalWrite(_le, HIGH) ;
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delayMicroseconds(5) ;
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digitalWrite(_le, LOW) ;
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}
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uint32_t ADF4351::getReg(int n)
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{
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return R[n].whole ;
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}
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uint32_t ADF4351::gcd_iter(uint32_t u, uint32_t v)
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{
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uint32_t t;
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while (v) {
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t = u ;
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u = v ;
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v = t % v ;
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}
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return u ;
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}
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