Current status

This commit is contained in:
Kumi 2023-08-18 10:47:39 +02:00
parent 85dbceae26
commit af87a692cb
Signed by: kumi
GPG key ID: ECBCC9082395383F
5 changed files with 86 additions and 27 deletions

1
.gitignore vendored
View file

@ -20,6 +20,7 @@ lib64/
parts/ parts/
sdist/ sdist/
var/ var/
venv/
*.egg-info/ *.egg-info/
.installed.cfg .installed.cfg
*.egg *.egg

View file

@ -1,6 +1,6 @@
The MIT License (MIT) The MIT License (MIT)
Copyright (c) 2016 Stefan Wendler Copyright (c) 2016 Stefan Wendler, 2023 Kumi <micropython-mfrc522@kumi.email>
Permission is hereby granted, free of charge, to any person obtaining a copy Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal of this software and associated documentation files (the "Software"), to deal

View file

@ -1,3 +0,0 @@
#!/usr/bin/env bash
mpfshell -c "open ttyUSB0; put mfrc522.py; lcd examples; put read.py; put write.py; ls" -n

View file

@ -1,3 +0,0 @@
#!/usr/bin/env bash
mpfshell -c "open ttyUSB0; cd flash/lib; put mfrc522.py; lcd examples; put read.py; put write.py; ls" -n

View file

@ -3,6 +3,9 @@ from os import uname
class MFRC522: class MFRC522:
""" MicroPython class to communicate with the MFRC522 RFID module """
# Constants
OK = 0 OK = 0
NOTAGERR = 1 NOTAGERR = 1
@ -13,39 +16,100 @@ class MFRC522:
AUTHENT1A = 0x60 AUTHENT1A = 0x60
AUTHENT1B = 0x61 AUTHENT1B = 0x61
def __init__(self, sck, mosi, miso, rst, cs): def __init__(self, sck: int = None, mosi: int = None, miso: int = None, rst: int = None, cs: int = None, spi: SPI = None):
""" Initialize the MFRC522 module
For compatibility with the original library, the pins can be specified
as arguments for WiPy, LoPy, FiPy and ESP8266. For other platforms, an
initialized SPI object must be passed as argument.
```python
# For ESP8266:
mfrc522_esp8266 = MFRC522(0, 2, 4, 5, 14)
# For ESP32:
from machine import SoftSPI, Pin
sck = Pin(18, Pin.OUT)
mosi = Pin(23, Pin.OUT)
miso = Pin(19, Pin.OUT)
spi = SoftSPI(baudrate=100000, polarity=0, phase=0, sck=sck, mosi=mosi, miso=miso)
spi.init()
sda = Pin(5, Pin.OUT)
mfrc522_esp32 = MFRC522(spi=spi, cs=sda)
```
:param sck: SPI clock pin
:param mosi: SPI MOSI pin
:param miso: SPI MISO pin
:param rst: Reset pin
:param cs: Chip select pin
:param spi: Initialized SPI object
"""
if not spi:
# Initialize SPI bus on given pins
self.sck = Pin(sck, Pin.OUT)
self.mosi = Pin(mosi, Pin.OUT)
self.miso = Pin(miso)
board = uname()[0]
# Due to differences in the SPI initialization, only the following
# platforms are supported
if board == 'WiPy' or board == 'LoPy' or board == 'FiPy':
self.spi = SPI(0)
self.spi.init(SPI.MASTER, baudrate=1000000, pins=(self.sck, self.mosi, self.miso))
elif board == 'esp8266':
self.spi = SPI(baudrate=100000, polarity=0, phase=0, sck=self.sck, mosi=self.mosi, miso=self.miso)
self.spi.init()
else:
raise RuntimeError("Unsupported platform - please provide an initialized SPI object")
else:
self.spi = spi
if rst:
# Initialize reset pin
self.rst = Pin(rst, Pin.OUT)
self.rst.value(1)
else:
self.rst = None
# Initialize chip select pin
self.sck = Pin(sck, Pin.OUT)
self.mosi = Pin(mosi, Pin.OUT)
self.miso = Pin(miso)
self.rst = Pin(rst, Pin.OUT)
self.cs = Pin(cs, Pin.OUT) self.cs = Pin(cs, Pin.OUT)
self.rst.value(0)
self.cs.value(1) self.cs.value(1)
board = uname()[0] # Continue in dedicated function
if board == 'WiPy' or board == 'LoPy' or board == 'FiPy':
self.spi = SPI(0)
self.spi.init(SPI.MASTER, baudrate=1000000, pins=(self.sck, self.mosi, self.miso))
elif board == 'esp8266':
self.spi = SPI(baudrate=100000, polarity=0, phase=0, sck=self.sck, mosi=self.mosi, miso=self.miso)
self.spi.init()
else:
raise RuntimeError("Unsupported platform")
self.rst.value(1)
self.init() self.init()
def _wreg(self, reg, val): def _wreg(self, reg: bytes, val: bytes):
""" Write a value to a register
:param reg: Register address
:param val: Value to write
"""
self.cs.value(0) self.cs.value(0)
self.spi.write(b'%c' % int(0xff & ((reg << 1) & 0x7e))) self.spi.write(b'%c' % int(0xff & ((reg << 1) & 0x7e)))
self.spi.write(b'%c' % int(0xff & val)) self.spi.write(b'%c' % int(0xff & val))
self.cs.value(1) self.cs.value(1)
def _rreg(self, reg): def _rreg(self, reg: bytes):
""" Read a value from a register
:param reg: Register address
:return: Value read
"""
self.cs.value(0) self.cs.value(0)
self.spi.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80))) self.spi.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80)))