fa8e8d262e
The GW5520 is a small form-factor single-board computer with the following features: * 70x100mm form-factor * IMX6DL 800MHz SoC (IMX6Q optional) * 512MB 32bit DDR3 SDRAM (up to 2GB optional) * 256MB NAND FLASH (up to 2GB optional) * Gateworks System Controller * 2x front-panel Intel i210 GbE adapters with passive PoE support * 2x MiniPCIe sockets with USB support * 2x front-panel USB * 1x rear-panel full-size HDMI connector * 1x front-panel bi-color user LED * 1x front-panel user pushbutton * 1x rear-panel barrel jack for power * 1x Application connector with: * 2x TTL level UARTs * 10x TTL level Digital IO Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 42148
58 lines
1.9 KiB
Diff
58 lines
1.9 KiB
Diff
This patch allows passing in the gpio output mask used for GPIO0-7 on the
|
|
PLX PCIe bridge. These GPIO's are used for PERST# on the downstream ports.
|
|
|
|
Allowing the kernel to override the default configuration allows for keeping
|
|
specific devices held in reset. One important use of this is to allow
|
|
temporarily disabling devices that may request too many resources such as
|
|
an unprogrammed i210 device.
|
|
|
|
--- a/arch/arm/mach-imx/mach-imx6q.c
|
|
+++ b/arch/arm/mach-imx/mach-imx6q.c
|
|
@@ -84,6 +84,7 @@ static int ksz9031rn_phy_fixup(struct ph
|
|
* fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
|
|
* as they are used for slots1-7 PERST#
|
|
*/
|
|
+unsigned int ventana_plx_gpio = 0xfe;
|
|
static void ventana_pciesw_early_fixup(struct pci_dev *dev)
|
|
{
|
|
u32 dw;
|
|
@@ -95,19 +96,25 @@ static void ventana_pciesw_early_fixup(s
|
|
return;
|
|
|
|
pci_read_config_dword(dev, 0x62c, &dw);
|
|
+ dev_info(&dev->dev, "de-asserting downstream PERST# 0x%04x\n",
|
|
+ ventana_plx_gpio);
|
|
dw |= 0xaaa8; // GPIO1-7 outputs
|
|
pci_write_config_dword(dev, 0x62c, dw);
|
|
-
|
|
- pci_read_config_dword(dev, 0x644, &dw);
|
|
- dw |= 0xfe; // GPIO1-7 output high
|
|
- pci_write_config_dword(dev, 0x644, dw);
|
|
-
|
|
+ pci_write_config_dword(dev, 0x644, ventana_plx_gpio);
|
|
msleep(100);
|
|
}
|
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
|
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
|
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
|
|
|
|
+static int __init setup_ventana_plx_gpio(char *str)
|
|
+{
|
|
+ get_option(&str, &ventana_plx_gpio);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+early_param("plx_gpio", setup_ventana_plx_gpio);
|
|
+
|
|
static int ar8031_phy_fixup(struct phy_device *dev)
|
|
{
|
|
u16 val;
|
|
@@ -308,7 +315,7 @@ static void __init imx6q_init_irq(void)
|
|
irqchip_init();
|
|
}
|
|
|
|
-static const char *imx6q_dt_compat[] __initconst = {
|
|
+static const char *imx6q_dt_compat[] __initdata = {
|
|
"fsl,imx6dl",
|
|
"fsl,imx6q",
|
|
NULL,
|