52 lines
1.4 KiB
Diff
52 lines
1.4 KiB
Diff
From eb694e964310ba402d6ff99f08e0ef78345e7397 Mon Sep 17 00:00:00 2001
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From: Thomas Pedersen <twp@codeaurora.org>
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Date: Mon, 16 May 2016 17:58:52 -0700
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Subject: [PATCH 03/37] arm: qcom: dts: ipq8064: Add ADM device node
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Original patch by Andy Gross.
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Signed-off-by: Andy Gross <agross@codeaurora.org>
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Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -1,9 +1,11 @@
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/dts-v1/;
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#include "skeleton.dtsi"
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+#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
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#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
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#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Qualcomm IPQ8064";
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@@ -342,5 +344,24 @@
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#reset-cells = <1>;
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};
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+ adm_dma: dma@18300000 {
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+ compatible = "qcom,adm";
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+ reg = <0x18300000 0x100000>;
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+ interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
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+ #dma-cells = <1>;
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+
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+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
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+ clock-names = "core", "iface";
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+
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+ resets = <&gcc ADM0_RESET>,
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+ <&gcc ADM0_PBUS_RESET>,
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+ <&gcc ADM0_C0_RESET>,
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+ <&gcc ADM0_C1_RESET>,
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+ <&gcc ADM0_C2_RESET>;
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+ reset-names = "clk", "pbus", "c0", "c1", "c2";
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+ qcom,ee = <0>;
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+
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+ status = "disabled";
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+ };
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};
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};
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