f791fb4af4
Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Tim Harvey <tharvey@gateworks.com> [fixes]
48 lines
1.6 KiB
Diff
48 lines
1.6 KiB
Diff
From: Matt Redfearn <matt.redfearn@imgtec.com>
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Date: Mon, 19 Dec 2016 14:20:58 +0000
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Subject: [PATCH] MIPS: Only change $28 to thread_info if coming from user
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mode
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The SAVE_SOME macro is used to save the execution context on all
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exceptions.
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If an exception occurs while executing user code, the stack is switched
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to the kernel's stack for the current task, and register $28 is switched
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to point to the current_thread_info, which is at the bottom of the stack
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region.
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If the exception occurs while executing kernel code, the stack is left,
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and this change ensures that register $28 is not updated. This is the
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correct behaviour when the kernel can be executing on the separate irq
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stack, because the thread_info will not be at the base of it.
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With this change, register $28 is only switched to it's kernel
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conventional usage of the currrent thread info pointer at the point at
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which execution enters kernel space. Doing it on every exception was
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redundant, but OK without an IRQ stack, but will be erroneous once that
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is introduced.
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Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
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Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
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---
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--- a/arch/mips/include/asm/stackframe.h
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+++ b/arch/mips/include/asm/stackframe.h
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@@ -216,12 +216,19 @@
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LONG_S $25, PT_R25(sp)
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LONG_S $28, PT_R28(sp)
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LONG_S $31, PT_R31(sp)
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+
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+ /* Set thread_info if we're coming from user mode */
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+ mfc0 k0, CP0_STATUS
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+ sll k0, 3 /* extract cu0 bit */
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+ bltz k0, 9f
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+
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ori $28, sp, _THREAD_MASK
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xori $28, _THREAD_MASK
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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.set mips64
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pref 0, 0($28) /* Prefetch the current pointer */
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#endif
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+9:
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.set pop
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.endm
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