198 lines
4.1 KiB
Diff
198 lines
4.1 KiB
Diff
From 1238d973f3828a65ccf9aead437b4e04925b100e Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 21 Mar 2013 17:47:24 +0100
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Subject: [PATCH 106/121] MIPS: add RT5350 dtsi file
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Add a dtsi file for RT5350 Soc. This SoC is almost the same as RT3050 but has
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OHCI/EHCI in favour of the Synopsis DWC2 core.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ralink/dts/rt5350.dtsi | 181 ++++++++++++++++++++++++++++++++++++++
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1 file changed, 181 insertions(+)
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create mode 100644 arch/mips/ralink/dts/rt5350.dtsi
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--- /dev/null
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+++ b/arch/mips/ralink/dts/rt5350.dtsi
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@@ -0,0 +1,181 @@
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "ralink,rt5350-soc";
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+
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+ cpus {
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+ cpu@0 {
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+ compatible = "mips,mips24KEc";
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+ };
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttyS0,57600 init=/init";
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+ };
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+
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+ cpuintc: cpuintc@0 {
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ interrupt-controller;
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+ compatible = "mti,cpu-interrupt-controller";
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+ };
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+
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+ palmbus@10000000 {
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+ compatible = "palmbus";
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+ reg = <0x10000000 0x200000>;
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+ ranges = <0x0 0x10000000 0x1FFFFF>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ sysc@0 {
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+ compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc";
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+ reg = <0x0 0x100>;
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+ };
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+
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+ timer@100 {
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+ compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
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+ reg = <0x100 0x20>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <1>;
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+
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+ status = "disabled";
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+ };
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+
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+ watchdog@120 {
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+ compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
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+ reg = <0x120 0x10>;
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+ };
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+
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+ intc: intc@200 {
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+ compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
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+ reg = <0x200 0x100>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <2>;
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+ };
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+
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+ memc@300 {
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+ compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
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+ reg = <0x300 0x100>;
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+ };
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+
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+ gpio0: gpio@600 {
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+ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
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+ reg = <0x600 0x34>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <24>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 20 24 28 2c
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+ 30 34 ];
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+
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+ status = "disabled";
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+ };
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+
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+ gpio1: gpio@638 {
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+ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
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+ reg = <0x638 0x24>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <16>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 10 14 18 1c
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+ 20 24 ];
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+
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+ status = "disabled";
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+ };
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+
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+ gpio2: gpio@660 {
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+ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
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+ reg = <0x660 0x24>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <12>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 10 14 18 1c
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+ 20 24 ];
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+
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+ status = "disabled";
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+ };
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+
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+ spi@b00 {
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+ compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
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+ reg = <0xb00 0x100>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ status = "disabled";
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+ };
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+
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+ uartlite@c00 {
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+ compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
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+ reg = <0xc00 0x100>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <12>;
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+
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+ reg-shift = <2>;
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+ };
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+ };
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+
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+ ethernet@10100000 {
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+ compatible = "ralink,rt5350-eth", "ralink,rt3050-eth";
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+ reg = <0x10100000 10000>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <5>;
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+
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+ status = "disabled";
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+ };
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+
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+ esw@10110000 {
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+ compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
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+ reg = <0x10110000 8000>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <17>;
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+
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+ status = "disabled";
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+ };
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+
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+ wmac@10180000 {
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+ compatible = "ralink,rt5350-wmac", "ralink,rt2880-wmac";
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+ reg = <0x10180000 40000>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <6>;
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+
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+ status = "disabled";
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+ };
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+
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+ ehci@101c0000 {
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+ compatible = "ralink,rt5350-ehci", "ehci-platform";
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+ reg = <0x101c0000 0x1000>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <18>;
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+
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+ status = "disabled";
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+ };
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+
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+ ohci@101c1000 {
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+ compatible = "ralink,rt5350-ohci", "ohci-platform";
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+ reg = <0x101c1000 0x1000>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <18>;
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+
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+ status = "disabled";
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+ };
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+};
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