7dca1bae82
Refresh patches. Drop patches that have been upstreamed: target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch target/linux/generic/backport-4.9/095-v4.12-ipv6-Need-to-export-ipv6_push_frag_opts-for-tunnelin.patch target/linux/generic/pending-4.9/180-net-phy-at803x-add-support-for-AT8032.patch target/linux/generic/pending-4.9/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch target/linux/generic/pending-4.9/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch Compile & run tested: ar71xx Archer C7 v2 Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
162 lines
4.8 KiB
Diff
162 lines
4.8 KiB
Diff
From c35aec61e5bb0faafb2847a0d750ebd7345a4b0f Mon Sep 17 00:00:00 2001
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From: Yangbo Lu <yangbo.lu@nxp.com>
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Date: Wed, 17 Jan 2018 15:40:24 +0800
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Subject: [PATCH 28/30] tty: serial: support layerscape
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This is an integrated patch for layerscape uart support.
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Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
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Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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---
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drivers/tty/serial/fsl_lpuart.c | 66 ++++++++++++++++++++++++++++-------------
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1 file changed, 46 insertions(+), 20 deletions(-)
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--- a/drivers/tty/serial/fsl_lpuart.c
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+++ b/drivers/tty/serial/fsl_lpuart.c
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@@ -231,6 +231,8 @@
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#define DEV_NAME "ttyLP"
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#define UART_NR 6
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+static DECLARE_BITMAP(linemap, UART_NR);
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+
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struct lpuart_port {
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struct uart_port port;
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struct clk *clk;
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@@ -1348,6 +1350,18 @@ lpuart_set_termios(struct uart_port *por
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/* ask the core to calculate the divisor */
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baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16);
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+ /*
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+ * Need to update the Ring buffer length according to the selected
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+ * baud rate and restart Rx DMA path.
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+ *
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+ * Since timer function acqures sport->port.lock, need to stop before
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+ * acquring same lock because otherwise del_timer_sync() can deadlock.
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+ */
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+ if (old && sport->lpuart_dma_rx_use) {
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+ del_timer_sync(&sport->lpuart_timer);
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+ lpuart_dma_rx_free(&sport->port);
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+ }
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+
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spin_lock_irqsave(&sport->port.lock, flags);
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sport->port.read_status_mask = 0;
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@@ -1397,22 +1411,11 @@ lpuart_set_termios(struct uart_port *por
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/* restore control register */
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writeb(old_cr2, sport->port.membase + UARTCR2);
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- /*
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- * If new baud rate is set, we will also need to update the Ring buffer
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- * length according to the selected baud rate and restart Rx DMA path.
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- */
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- if (old) {
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- if (sport->lpuart_dma_rx_use) {
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- del_timer_sync(&sport->lpuart_timer);
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- lpuart_dma_rx_free(&sport->port);
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- }
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-
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- if (sport->dma_rx_chan && !lpuart_start_rx_dma(sport)) {
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- sport->lpuart_dma_rx_use = true;
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+ if (old && sport->lpuart_dma_rx_use) {
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+ if (!lpuart_start_rx_dma(sport))
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rx_dma_timer_init(sport);
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- } else {
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+ else
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sport->lpuart_dma_rx_use = false;
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- }
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}
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spin_unlock_irqrestore(&sport->port.lock, flags);
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@@ -1640,6 +1643,13 @@ lpuart_console_write(struct console *co,
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{
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struct lpuart_port *sport = lpuart_ports[co->index];
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unsigned char old_cr2, cr2;
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+ unsigned long flags;
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+ int locked = 1;
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+
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+ if (sport->port.sysrq || oops_in_progress)
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+ locked = spin_trylock_irqsave(&sport->port.lock, flags);
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+ else
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+ spin_lock_irqsave(&sport->port.lock, flags);
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/* first save CR2 and then disable interrupts */
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cr2 = old_cr2 = readb(sport->port.membase + UARTCR2);
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@@ -1654,6 +1664,9 @@ lpuart_console_write(struct console *co,
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barrier();
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writeb(old_cr2, sport->port.membase + UARTCR2);
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+
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+ if (locked)
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+ spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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static void
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@@ -1661,6 +1674,13 @@ lpuart32_console_write(struct console *c
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{
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struct lpuart_port *sport = lpuart_ports[co->index];
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unsigned long old_cr, cr;
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+ unsigned long flags;
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+ int locked = 1;
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+
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+ if (sport->port.sysrq || oops_in_progress)
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+ locked = spin_trylock_irqsave(&sport->port.lock, flags);
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+ else
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+ spin_lock_irqsave(&sport->port.lock, flags);
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/* first save CR2 and then disable interrupts */
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cr = old_cr = lpuart32_read(sport->port.membase + UARTCTRL);
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@@ -1675,6 +1695,9 @@ lpuart32_console_write(struct console *c
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barrier();
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lpuart32_write(old_cr, sport->port.membase + UARTCTRL);
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+
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+ if (locked)
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+ spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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/*
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@@ -1899,13 +1922,13 @@ static int lpuart_probe(struct platform_
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ret = of_alias_get_id(np, "serial");
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if (ret < 0) {
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- dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
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- return ret;
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- }
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- if (ret >= ARRAY_SIZE(lpuart_ports)) {
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- dev_err(&pdev->dev, "serial%d out of range\n", ret);
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- return -EINVAL;
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+ ret = find_first_zero_bit(linemap, UART_NR);
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+ if (ret >= UART_NR) {
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+ dev_err(&pdev->dev, "port line is full, add device failed\n");
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+ return ret;
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+ }
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}
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+ set_bit(ret, linemap);
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sport->port.line = ret;
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sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart");
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@@ -1987,6 +2010,7 @@ static int lpuart_remove(struct platform
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struct lpuart_port *sport = platform_get_drvdata(pdev);
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uart_remove_one_port(&lpuart_reg, &sport->port);
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+ clear_bit(sport->port.line, linemap);
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clk_disable_unprepare(sport->clk);
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@@ -2071,12 +2095,10 @@ static int lpuart_resume(struct device *
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if (sport->lpuart_dma_rx_use) {
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if (sport->port.irq_wake) {
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- if (!lpuart_start_rx_dma(sport)) {
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- sport->lpuart_dma_rx_use = true;
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+ if (!lpuart_start_rx_dma(sport))
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rx_dma_timer_init(sport);
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- } else {
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+ else
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sport->lpuart_dma_rx_use = false;
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- }
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}
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}
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