2b55c83e68
All compiled device tree files not mentioned are binary identical to the former ones. Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts. Due to the include of the input binding header, the BTN_* node names in: - ramips/GL-MT300A.dts - ramips/GL-MT300N.dts - ramips/GL-MT750.dts - ramips/Timecloud.dts will be changed by the compiler to the numerical equivalent. Move the binding include of lantiq boards to the file where they are used the first time to hint the user where the values do come from. Signed-off-by: Mathias Kresin <dev@kresin.me>
229 lines
4.4 KiB
Text
229 lines
4.4 KiB
Text
/dts-v1/;
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#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "ARV7519RW22 - Orange Livebox 2.1";
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chosen {
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bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_green;
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led-running = &power_green;
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led-internet = &internet_green;
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};
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memory@0 {
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reg = <0x0 0x8000000>;
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};
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fpi@10000000 {
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localbus@0 {
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nor-boot@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x2000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x60000>;
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read-only;
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};
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partition@60000 {
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label = "uboot-env";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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label = "firmware";
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reg = <0x80000 0x1f00000>;
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};
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boardconfig: partition@1f80000 {
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label = "boardconfig";
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reg = <0x1f80000 0x80000>;
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read-only;
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};
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};
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};
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};
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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pcie-rst {
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lantiq,pins = "io21";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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};
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ifxhcd@E101000 {
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status = "okay";
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gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
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};
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ifxhcd@E106000 {
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status = "okay";
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gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
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};
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pcie@d900000 {
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status = "disabled";
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};
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/
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firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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rfkill {
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label = "rfkill";
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gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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lan_green {
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label = "arv7519rw22:green:lan";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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};
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internet_red {
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label = "arv7519rw22:red:internet";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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};
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power_green: power_green {
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label = "arv7519rw22:green:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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alarm_blue {
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label = "arv7519rw22:blue:alarm";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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internet_orange {
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label = "arv7519rw22:orange:internet";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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internet_green: internet_green {
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label = "arv7519rw22:green:internet";
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gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
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};
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voice_green {
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label = "arv7519rw22:green:voice";
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gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mtd-mac-address = <&boardconfig 0x16>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "mii";
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phy-handle = <&phy13>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "mii";
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phy-handle = <&phy14>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "mii";
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phy-handle = <&phy11>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <3>;
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phy-mode = "mii";
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phy-handle = <&phy12>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy12: ethernet-phy@12 {
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reg = <0x12>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy14: ethernet-phy@14 {
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reg = <0x14>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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