55a912f43e
Changelog: * https://cdn.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.22 * https://cdn.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.23 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47334
131 lines
4.4 KiB
Diff
131 lines
4.4 KiB
Diff
--- a/arch/mips/ralink/mt7620.c
|
|
+++ b/arch/mips/ralink/mt7620.c
|
|
@@ -101,28 +101,28 @@ static struct rt2880_pmx_group mt7620a_p
|
|
};
|
|
|
|
static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
|
|
- FUNC("sdxc", 3, 19, 1),
|
|
+ FUNC("sdxc d6", 3, 19, 1),
|
|
FUNC("utif", 2, 19, 1),
|
|
FUNC("gpio", 1, 19, 1),
|
|
- FUNC("pwm", 0, 19, 1),
|
|
+ FUNC("pwm1", 0, 19, 1),
|
|
};
|
|
|
|
static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
|
|
- FUNC("sdxc", 3, 18, 1),
|
|
+ FUNC("sdxc d7", 3, 18, 1),
|
|
FUNC("utif", 2, 18, 1),
|
|
FUNC("gpio", 1, 18, 1),
|
|
- FUNC("pwm", 0, 18, 1),
|
|
+ FUNC("pwm0", 0, 18, 1),
|
|
};
|
|
|
|
static struct rt2880_pmx_func uart2_grp_mt7628[] = {
|
|
- FUNC("sdxc", 3, 20, 2),
|
|
+ FUNC("sdxc d5 d4", 3, 20, 2),
|
|
FUNC("pwm", 2, 20, 2),
|
|
FUNC("gpio", 1, 20, 2),
|
|
FUNC("uart2", 0, 20, 2),
|
|
};
|
|
|
|
static struct rt2880_pmx_func uart1_grp_mt7628[] = {
|
|
- FUNC("sdxc", 3, 45, 2),
|
|
+ FUNC("sw_r", 3, 45, 2),
|
|
FUNC("pwm", 2, 45, 2),
|
|
FUNC("gpio", 1, 45, 2),
|
|
FUNC("uart1", 0, 45, 2),
|
|
@@ -165,7 +165,7 @@ static struct rt2880_pmx_func spi_cs1_gr
|
|
FUNC("-", 3, 6, 1),
|
|
FUNC("refclk", 2, 6, 1),
|
|
FUNC("gpio", 1, 6, 1),
|
|
- FUNC("spi", 0, 6, 1),
|
|
+ FUNC("spi cs1", 0, 6, 1),
|
|
};
|
|
|
|
static struct rt2880_pmx_func spis_grp_mt7628[] = {
|
|
@@ -182,27 +182,43 @@ static struct rt2880_pmx_func gpio_grp_m
|
|
FUNC("gpio", 0, 11, 1),
|
|
};
|
|
|
|
-#define MT7628_GPIO_MODE_MASK 0x3
|
|
-
|
|
-#define MT7628_GPIO_MODE_PWM1 30
|
|
-#define MT7628_GPIO_MODE_PWM0 28
|
|
-#define MT7628_GPIO_MODE_UART2 26
|
|
-#define MT7628_GPIO_MODE_UART1 24
|
|
-#define MT7628_GPIO_MODE_I2C 20
|
|
-#define MT7628_GPIO_MODE_REFCLK 18
|
|
-#define MT7628_GPIO_MODE_PERST 16
|
|
-#define MT7628_GPIO_MODE_WDT 14
|
|
-#define MT7628_GPIO_MODE_SPI 12
|
|
-#define MT7628_GPIO_MODE_SDMODE 10
|
|
-#define MT7628_GPIO_MODE_UART0 8
|
|
-#define MT7628_GPIO_MODE_I2S 6
|
|
-#define MT7628_GPIO_MODE_CS1 4
|
|
-#define MT7628_GPIO_MODE_SPIS 2
|
|
-#define MT7628_GPIO_MODE_GPIO 0
|
|
+static struct rt2880_pmx_func wled_kn_grp_mt7628[] = {
|
|
+ FUNC("rsvd", 3, 35, 1),
|
|
+ FUNC("rsvd", 2, 35, 1),
|
|
+ FUNC("gpio", 1, 35, 1),
|
|
+ FUNC("wled_kn", 0, 35, 1),
|
|
+};
|
|
+
|
|
+static struct rt2880_pmx_func wled_an_grp_mt7628[] = {
|
|
+ FUNC("rsvd", 3, 35, 1),
|
|
+ FUNC("rsvd", 2, 35, 1),
|
|
+ FUNC("gpio", 1, 35, 1),
|
|
+ FUNC("wled_an", 0, 35, 1),
|
|
+};
|
|
+
|
|
+#define MT7628_GPIO_MODE_MASK 0x3
|
|
+
|
|
+#define MT7628_GPIO_MODE_WLED_KN 48
|
|
+#define MT7628_GPIO_MODE_WLED_AN 32
|
|
+#define MT7628_GPIO_MODE_PWM1 30
|
|
+#define MT7628_GPIO_MODE_PWM0 28
|
|
+#define MT7628_GPIO_MODE_UART2 26
|
|
+#define MT7628_GPIO_MODE_UART1 24
|
|
+#define MT7628_GPIO_MODE_I2C 20
|
|
+#define MT7628_GPIO_MODE_REFCLK 18
|
|
+#define MT7628_GPIO_MODE_PERST 16
|
|
+#define MT7628_GPIO_MODE_WDT 14
|
|
+#define MT7628_GPIO_MODE_SPI 12
|
|
+#define MT7628_GPIO_MODE_SDMODE 10
|
|
+#define MT7628_GPIO_MODE_UART0 8
|
|
+#define MT7628_GPIO_MODE_I2S 6
|
|
+#define MT7628_GPIO_MODE_CS1 4
|
|
+#define MT7628_GPIO_MODE_SPIS 2
|
|
+#define MT7628_GPIO_MODE_GPIO 0
|
|
|
|
static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
|
|
- GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
|
|
- GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
|
|
+ GRP_G("pwm1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
|
|
+ GRP_G("pwm0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
|
|
GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART2),
|
|
GRP_G("uart1", uart1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART1),
|
|
GRP_G("i2c", i2c_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_I2C),
|
|
@@ -216,6 +232,8 @@ static struct rt2880_pmx_group mt7628an_
|
|
GRP_G("spi cs1", spi_cs1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_CS1),
|
|
GRP_G("spis", spis_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_SPIS),
|
|
GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_GPIO),
|
|
+ GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_AN),
|
|
+ GRP_G("wled_kn", wled_kn_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_KN),
|
|
{ 0 }
|
|
};
|
|
|
|
@@ -529,7 +547,11 @@ void prom_soc_init(struct ralink_soc_inf
|
|
(rev & CHIP_REV_ECO_MASK));
|
|
|
|
cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
|
|
- dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
|
|
+
|
|
+ if (ralink_soc == MT762X_SOC_MT7628AN)
|
|
+ dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
|
|
+ else
|
|
+ dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
|
|
|
|
soc_info->mem_base = MT7620_DRAM_BASE;
|
|
if (ralink_soc == MT762X_SOC_MT7628AN)
|