openwrtv4/target/linux/lantiq/dts/TDW89X0.dtsi
Andreas Eberlein eba84bee4c lantiq: Sanitize device tree files
The device tree file of ARV752DPW uses numbers/hex values for gpio states and input event codes.

This cleans it up and uses the available macros from header files. This way the functions are easier to read and comprehend.

Signed-off-by: Andreas Eberlein <foodeas@aeberlein.de>
[sanitize all device tree files]
Signed-off-by: Mathias Kresin <dev@kresin.me>
2016-10-19 19:55:04 +02:00

253 lines
4.8 KiB
Text

#include "vr9.dtsi"
/ {
chosen {
bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
};
aliases {
/* the power led can't be controlled, use the wps led instead */
led-boot = &wps;
led-failsafe = &wps;
led-dsl = &dsl;
led-internet = &internet;
led-usb = &usb0;
led-usb2 = &usb2;
};
memory@0 {
reg = <0x0 0x4000000>;
};
cputemp@0 {
compatible = "lantiq,cputemp";
};
fpi@10000000 {
gpio: pinmux@E100B10 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1";
lantiq,function = "gphy";
lantiq,pull = <2>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
phy-rst {
lantiq,pins = "io42";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
ifxhcd@E101000 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
lantiq,portmask = <0x3>;
};
ifxhcd@E106000 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
};
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
firmware = "lantiq/vr9_phy11g_a2x.bin";
phys = [ 00 01 ];
};
ath9k_eep {
compatible = "ath9k,eeprom";
ath,eep-flash = <&ath9k_cal 0x21000>;
ath,mac-offset = <0xf100>;
ath,mac-increment = <2>;
ath,led-pin = <0>;
ath,disable-5ghz;
ath,led-active-high;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wifi {
label = "wifi";
gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
};
wps {
label = "wps";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
gpio-leds {
compatible = "gpio-leds";
/*
power is not controllable via gpio
*/
dsl: dsl {
label = "tdw89x0:green:dsl";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
internet: internet {
label = "tdw89x0:green:internet";
gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
};
usb0: usb0 {
label = "tdw89x0:green:usb";
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
usb2: usb2 {
label = "tdw89x0:green:usb2";
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
};
wps: wps {
label = "tdw89x0:green:wps";
gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
};
};
};
&spi {
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
status = "ok";
m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <4 0>;
spi-max-frequency = <33250000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
partition@20000 {
reg = <0x20000 0x7a0000>;
label = "firmware";
};
partition@7c0000 {
reg = <0x7c0000 0x10000>;
label = "config";
read-only;
};
ath9k_cal: partition@7d0000 {
reg = <0x7d0000 0x30000>;
label = "boardconfig";
read-only;
};
};
};
};
&eth0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mtd-mac-address = <&ath9k_cal 0xf100>;
lantiq,switch;
ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
// gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
};
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "gmii";
phy-handle = <&phy11>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy5: ethernet-phy@5 {
reg = <0x5>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};