25afe99b31
the support is still WIP. next steps are to make the pmic and ethernet work. this is the first commit to make sure nothing gets lost. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47354
49 lines
1.4 KiB
Diff
49 lines
1.4 KiB
Diff
From 720e25e5c821336f7fa0c5fb564475c791c00340 Mon Sep 17 00:00:00 2001
|
|
From: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Date: Wed, 13 May 2015 10:52:43 +0200
|
|
Subject: [PATCH 24/76] ARM64: dts: mt8173: Add thermal/auxadc device nodes
|
|
|
|
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
---
|
|
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 ++++++++++++++++++
|
|
1 file changed, 18 insertions(+)
|
|
|
|
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
|
|
index 924fdb6..50d424f 100644
|
|
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
|
|
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
|
|
@@ -147,6 +147,11 @@
|
|
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
|
};
|
|
|
|
+ auxadc: auxadc@11001000 {
|
|
+ compatible = "mediatek,mt8173-auxadc";
|
|
+ reg = <0 0x11001000 0 0x1000>;
|
|
+ };
|
|
+
|
|
uart0: serial@11002000 {
|
|
compatible = "mediatek,mt8173-uart",
|
|
"mediatek,mt6577-uart";
|
|
@@ -182,6 +187,19 @@
|
|
clocks = <&uart_clk>;
|
|
status = "disabled";
|
|
};
|
|
+
|
|
+ thermal: thermal@1100b000 {
|
|
+ #thermal-sensor-cells = <1>;
|
|
+ compatible = "mediatek,mt8173-thermal";
|
|
+ reg = <0 0x1100b000 0 0x1000>;
|
|
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
|
|
+ clock-names = "therm", "auxadc";
|
|
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
|
|
+ reset-names = "therm";
|
|
+ auxadc = <&auxadc>;
|
|
+ apmixedsys = <&apmixedsys>;
|
|
+ };
|
|
};
|
|
|
|
};
|
|
--
|
|
1.7.10.4
|
|
|